• Title/Summary/Keyword: Cycle simulator

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A Study on the Evaluation of Scavenging Efficiency in a Two-Stroke Diesel Engine. (2행정 디젤기관의 소기 효율 평가에 관한 연구)

  • Jo, Gyu-Baek;Gang, Geon-Yong;Lee, Jin-Uk;Jeong, Yong-Il
    • 연구논문집
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    • s.28
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    • pp.49-58
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    • 1998
  • In order to analyse the scavenging efficiency in a poppet valve type 2-stroke engine. visualization of scavenging flow and quantitative experiments for measuring scavenging efficiency were performed. The effect of shroud angle in RSSV which was developed by KIMM was evaluated under steady flow rig applying single-cycle method. Also dynamic simulator was used by using gas sampling with $CO_2$ and $O_2$gas. The $90^circ$ shroud RSSV was found to be the highest efficient system, and single-cycle and dynamic simulator test are very effective to save time and cost for the development of a 2-stroke engine.

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Simulator Development for Startup Analysis of Staged Combustion Cycle Engine Powerpack (다단연소사이클 엔진 파워팩 시동 해석 시뮬레이터 개발)

  • Lee, Suji;Moon, Insang
    • Journal of the Korean Society of Propulsion Engineers
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    • v.19 no.5
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    • pp.62-70
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    • 2015
  • A liquid rocket engine system can cause rapid pressure and temperature variations during the startup period. Thus the startup analysis is required to reduce time and expense for successful development of liquid rocket engine through the startup prediction. In this study, a startup analysis simulator is developed for a staged combustion cycle engine powerpack. This simulator calculates propellant flow rates using pressure and flow rate balances. In addition, a rotational speed of turbopump is obtained as a function of time by mathematical modeling. A startup analysis result shows that the time to reach a steady-state and a rotational speed at the steady-state are 1.3 sec and 27,500 rpm, respectively. Moreover it can indicate proper startup sequences for stable operation.

A study on the design of boron diffusion simulator applicable for shallow $p^+-n$ junction formation (박막 $p^+-n$ 접합 형성을 위한 보론 확산 시뮬레이터의 제작에 관한 연구)

  • Kim, Jae-Young;Kim, Bo-Ra;Hong, Shin-Nam
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2004.04b
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    • pp.30-33
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    • 2004
  • Shallow p+-n junctions were formed by low-energy ion implantation and dual-step annealing processes The dopant implantation was performed into the crystalline substrates using $BF_2$ ions. The annealing was performed with a rapid thermal processor and a furnace. FA+RTA annealing sequence exhibited better junction characteristics than RTA+FA thermal cycle from the viewpoint of junction depth. A new simulator is designed to model boron diffusion in silicon, which is especially useful for analyzing the annealing process subsequent to ion implantation. The model which is used in this simulator takes into account nonequilibrium diffusion, reactions of point defects, and defect-dopant pairs considering their charge states, and the dopant inactivation by introducing a boron clustering reaction. Using a resonable parameter values, the simulator covers not only the equilibrium diffusion conditions but also the nonequilibrium post-implantation diffusion. Using initial conditions and boundary conditions, coupled diffusion equation is solved successfully. The simulator reproduced experimental data successfully.

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A Study on Wear and Wear Mechanism of Exhaust Valve and Seat Insert Depending on Different Speeds Using a Simulator

  • Hong, Jae-Soo;Chun, Keyoung-Jin;Youn, Young-Han
    • Journal of Mechanical Science and Technology
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    • v.20 no.12
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    • pp.2052-2060
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    • 2006
  • The wear of engine valve and seat insert is one of the most important factors which affect engine performance. Because of higher demands on performance and the increasing use of alternative fuel, engine valve and seat insert are challenged with greater wear problems than in the past. In order to solve the above problems, a simulator was developed to be able to generate and control high temperatures and various speeds during motion. The wear simulator is considered to be a valid simulation of the engine valve and seat insert wear process with various speeds during engine activity. This work focuses on the different degrees of wear at three different singular test speeds (10 Hz, 25 Hz & multi-Hz). For this study, the temperature of the outer surface of the seat insert was controlled at 350$^{\circ}C$, and the test load was 1960 N. The test cycle number was $6.0{\times}10^6$. The mean ($\pm$standard error) wear depth of the valve at 10 Hz and 25 Hz was 45.1 ($\pm$3.7)$\mu$m and 81.7 ($\pm$2.5)$\mu$m, respectively. The mean wear depth of the seat insert at 10 Hz and 25 Hz was 52.7 ($\pm$3.9)$\mu$m and 91.2 ($\pm$2.7)$\mu$m, respectively. In the case of multi-Hz it was 70.7 ($\pm$2.4)$\mu$m and 77.4 ($\pm$3.8)$\mu$m, respectively. It was found that higher speed (25 Hz) cause a greater degree of wear than lower speed (10 Hz) under identical test condition (temperature, valve displacement, cycle number and test load). In the wear mechanisms of valves, adhesive wear, shear strain and abrasive wear could be observed. Also, in the wear mechanisms of seat inserts, adhesive wear, surface fatigue wear and abrasive wear could be observed.

Virtualized System Development Based on ERC32 Processor for Satellite Simulator (위성 시뮬레이터 개발을 위한 ERC32 프로세서 기반의 가상화 시스템 개발)

  • Choi, Jong-Wook;Shin, Hyun-Kyu;Lee, Jae-Seung;Cheon, Yee-Jin
    • Journal of Satellite, Information and Communications
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    • v.6 no.1
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    • pp.50-56
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    • 2011
  • During the development of flight software, the processor emulator and satellite simulator are essential tools for software development and verification. SWT/KARI developed the software-based spacecraft simulator based on TSIM-ERC32 processor emulator from Aeroflex Gaisler. But when developing flight software using TSIM-ERC32, there are much limitation for understanding of exact behavior of ERC32 processor, and it is impossible to change or modify the emulator core to develop the satellite simulator. To reslove this problem, this paper presents the development of new cycle-true ERC32 emulator as laysim-erc32 and describes the software development and debugging method on VxWorks/RTEMS RTOS.

The Study on Development and Verification of Rainfall-Runoff Simulator for LID Technology Verification (LID 기술의 효율성 검증을 위한 강우-유출 모의장치 개발 및 검증실험에 관한 연구)

  • Jang, Young Su;Kim, Mi Eun;Baek, Jong Seok;Shin, Hyun Suk
    • Journal of Korea Water Resources Association
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    • v.47 no.6
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    • pp.513-522
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    • 2014
  • Climate change and urbanization have affected a increase of peak discharge and water pollution etc. In a view of these aspects, the LID(Low Impact Development) technology has been highlighted as one of adjustable control measures to mimic predevelopment hydrologic condition. Many LID technologies have developed, but there is a lack of studies with verification of LID technology efficiency. Therefore this study developed a rainfall-runoff simulator could be possible to verify LID technology efficiency. Using this simulator, this study has experimented the rainfall verification through the rainfall distribution experiment and the experiment to show the relation between inflow and effective rainfall in order to sprinkle the equal rainfall in each unit bed. As a result, the study defined the relation between allowable discharge range and RPM by nozzle types and verified the hydrologic cycle such as the relation between infiltration rate, surface runoff and subsurface runoff at pervious area and impervious area through the rainfall-runoff experiment.

TeloSIM: Instruction-level Sensor Network Simulator for Telos Sensor Node (TeloSIM: Telos 형 센서노드를 위한 명령어 수준 센서네트워크 시뮬레이터)

  • Joe, Hyun-Woo;Kim, Hyung-Shin
    • Journal of KIISE:Computing Practices and Letters
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    • v.16 no.11
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    • pp.1021-1030
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    • 2010
  • In the sensor network, many tiny nodes construct Ad-Hoc network using wireless interface. As this type of system consists of thousands of nodes, managing each sensor node in real world after deploying them is very difficult. In order to install the sensor network successfully, it is necessary to verify its software using a simulator beforehand. In fact Sensor network simulators require high fidelity and timing accuracy to be used as a design, implementation, and evaluation tool of wireless sensor networks. Cycle-accurate, instruction-level simulation is the known solution for those purposes. In this paper, we developed an instruction-level sensor network simulator for Telos sensor node as named TeloSlM. It consists of MSP430 and CC2420. Recently, Telos is the most popular mote because MSP430 can consume the minimum energy in recent motes and CC2420 can support Zigbee. So that TeloSlM can provide the easy way for the developers to verify software. It is cycle-accurate in instruction-level simulator that is indispensable for OS and the specific functions and can simulate scalable sensor network at the same time. In addition, TeloSlM provides the GUI Tool to show result easily.

Development of a Virtual Simulator for Agile Manufacturing System

  • C., Sangmin;C., Younghee;B., Jongil;L., Manhyung
    • 제어로봇시스템학회:학술대회논문집
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    • 2000.10a
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    • pp.103-103
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    • 2000
  • In this paper to cope with the reduction of products life-cycle as the variety of products along with the various demands of consumers, a virtual simulator is developed to make the changeover of manufacturing line efficient to embody a virtual simulation similar to a real manufacturing line. The developed virtual simulator can design a layout of a factory and make the time scheduling. Every factory has one simulator so that one product can be manufactured in the factories to use them as virtual factories. We suggest a scheme that heightens the agility to the diversity of manufacturing models by making the information of manufacturing lines and products models to be shared. The developed unit simulator can construct a proper virtual manufacturing line along with the required process of products using several kinds of operator and work cell. A user with the simulator can utilize an interface that makes one to manage the separate task process for each manu(acturing module, change operator components and work cells, and easily teach tasks of each task module. The developed simulator was made for users convenience by Microsoft Visual C++ 6.0 that can develop a program supplying graphic user interface environment and by OpenGL of the Silicon Graphics as a graphic library to embody 3D graphic environment. Also, we show that the simulator can be used efficiently for the agile manufacturing by the communication among the factories being linked by TCP/IP and a hybrid database system made by a hierarchical model and a relational model being developed to standardize the data information.

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A Study on Development of a Cognitive Process Simulator Based on Model Human Processor (모델휴먼프로세서를 활용한 인지과정 시뮬레이터 구축에 관한 연구)

  • 이동하;나윤균
    • Journal of the Korean Society of Safety
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    • v.13 no.4
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    • pp.230-239
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    • 1998
  • Though limited, Model Human Processor (MHP) has been used to explain the complex users' behaviors during human-computer interactions in a simplified manner. MHP consists of perceptual, cognitive and motor systems, each with processors and memories interacting with each other in serial or parallel mode. The important parameters of memory include the storage capacity, the decay time, and the code type of a memorized item. The important parameter of a processor is the cycle time. Using these features of the model, this study developed a computerized cognitive process simulator to predict the cognitive process time of a class match task process. An experimental validity test result showed that the mean prediction time for cognitive process of the class match task simulated 50 times by the simulator was consistent with the mean cognitive process time of the same task performed by 37 subjects. Animation of the data flow during the class match task simulation will help understand the invisible human cognitive process.

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Practical Photovoltaic Simulator with a Cross Tackling Control Strategy Based on the First-hand Duty Cycle Processing

  • Wang, Shuren;Jiang, Wei;Lin, Zhengyu
    • Journal of Power Electronics
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    • v.15 no.4
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    • pp.1018-1025
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    • 2015
  • This paper proposes a methodological scheme for the photovoltaic (PV) simulator design. With the advantages of a digital controller system, linear interpolation is proposed for precise fitting with higher computational efficiency. A novel control strategy that directly tackles two different duty cycles is proposed and implemented to achieve a full-range operation including short circuit (SC) and open circuit (OC) conditions. Systematic design procedures for both hardware and algorithm are explained, and a prototype is built. Experimental results confirm an accurate steady state performance under different load conditions, including SC and OC. This low power apparatus can be adopted for PV education and research with a limited budget.