• 전력전자학회:학술대회논문집
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• 전력전자학회 1999년도 전력전자학술대회 논문집
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• pp.362-365
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• 1999

In this paper, the method of reducing harmonics and correcting of power factor in single PWM converter associated with diode rectifier and boos converter is studied. The ac-dc converter in which the harmonic distortion in the input current is reduced using a third harmonic injected PWM is proposed. A lower switching power loss and easy configuration o control circuit are obtained by adopting discontinuous current mode. Simulation and experimental results of ac-dc converter with 5[KHz] switching frequency are presented and correction of power factor and reduction of total harmonic distortion was established.

• 전력전자학회논문지
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• 제27권4호
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• pp.275-282
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• 2022

In this study, an inverter system connected to a grid through a paralleled LCL filter is proposed. The system consists of two inverters paralleled and operated with interleaved PWM for powering up and performance improvement. Two LCL filters have two separate filter inductors and one set of filter capacitor and grid inductor in common. The differential mode current circulates through two inverters and two filter inductors. The differential mode current is removed from the filter capacitor and the power grid. Accordingly, performance improvement can be achieved due to the reduced currents in the filter capacitor and the reduced harmonics into a grid. A single-phase prototype has been made and tested, and the proposal has been verified.

• 전력전자학회논문지
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• 제7권4호
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• pp.346-352
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• 2002

본 논문에서는 정류용 다이오드의 역 회복시 발생하는 손실을 줄이기 위한 새로운 듀얼 모드로 동작하는 ZCS-PWM 승압형 컨버터를 제안한다 제안된 회로에서 각각의 스위치는 소프트 스위칭 조건에서 매 사이클마다 교번으로 스위칭 동작을 하고 스위치 $S_2$에 직렬로 공진형 인덕터 Lr을 달아서 스위칭 손실과 EMI 노이즈와 관련된 정류용 다이오드$(D, D_1)$의 역 회복 전류를 감소시켰다. 제안된 컨버터는 기존의 ZVT-PWM 컨버터$^{[2]}$에 수동 및 능동 소자를 더 이상 추가하지 않기 때문에 각 소자들이 받는 전류/전압 스트레스는 기존의 하드 스위칭 컨버터 같다. 본 논문에서는 제안된 회로의 동작을 분석하고 이를 바탕으로 제작 및 실험을 통해서 타당성을 입증하였다.

• Journal of Power Electronics
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• 제19권1호
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• pp.108-118
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• 2019

This paper proposes a DC-link voltage balance controller using the fourth-phase of a three-level neutral-point clamped (NPC) PWM converter with medium vector selection (MVS) PWM for common-mode voltage reduction. MVS PWM makes the voltage reference by synthesizing the voltage vectors that cannot generate common-mode voltage. This PWM method is effective for reducing the EMI noise emitted from converter systems. However, the DC-link voltage imbalance problem is caused by the use of limited voltage vectors. Therefore, in this paper, the effect of MVS PWM on the DC-link voltage of a three-level NPC converter is analyzed. Then a proportional-derivative (PD) controller for the DC-link voltage balance is designed from the DC-link modeling. In addition, feedforward compensation of the neutral point current is included in the proposed PD controller. The effectiveness of the proposed controller is verified by experimental results.

• 조명전기설비학회논문지
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• 제17권3호
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• pp.32-39
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• 2003

동기발전기 출력전압은 여자시스템의 계자전류 제어에 의해 일정하게 유지된다. 고주파 PWM 컨버터(전류제어 모드 buck 컨버터) 형태의 여자시스템은 부하변동이 발생하였을 때 동기발전기의 계자전류를 제어하게 된다. 이 논문은 정상상태 및 과도상태에서의 안정화를 개선하기 위하여 여자시스템의 설계 및 실험에 대해 다루었다. 시뮬레이션 및 실험 결과는 제안된 여자시스템이 50[kW] 동기발전기의 DVR에 의해 응답시간이 개선되었음을 보여주었다.

• 전기전자학회논문지
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• 제14권2호
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• pp.1-8
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• 2010

본 논문에서는 대기전력을 줄일 수 있는 Green Mode Power IC 회로를 설계하였다. 이 회로는 switch mode power supply(SMPS)을 구동하기 위한 PWM 기능을 가지고 있으며, 불필요한 소비전력을 제거하기 위해 burst mode와 skip mode 구간을 만들고 대기전력을 낮출 수 있도록 외부의 Power MOSFET에 의해 제어된다. 제안한 회로는 KEC 30V-High Voltage 0.5um CMOS process를 이용하여 시뮬레이션 하였다. 회로 내부는 크게 voltage regulator 회로, voltage reference 회로, UVLO(Under Voltage Lock Out)회로, Ibias 회로, green 회로, PWM 회로, OSC 회로, protection회로, control 회로, Level shift&Driver 회로로 구성되어 있다. 시뮬레이션 결과로부터 회로 동작 시 각 블록의 소비전류를 측정하여 확인한 결과 블록 별 전류총합이 1.29mA이었고, 이 값은 목표 설계치인 1.3mA을 충족시킴을 입증하였다. 이 값은 기존 IC의 소비전류보다 1/2이상 줄어든 값이며, 대기모드로 동작할 경우는 전력소비를 1W 미만까지 줄일 수 있었다.

• 대한전기학회논문지:전기기기및에너지변환시스템부문B
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• 제48권11호
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• pp.646-654
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• 1999

This paper deals with PWM patterns for harmonic reduction in inverter fed traction motors and the gear changing techniques for the variable speed drive of traction motor. GTOs are used as switching device of inverter because traction motor is a large load. To derive PWM rattern which can minimize the harmonics with the limited switching frequency, the output current and torque characteristic of SPWM and SHE PWM was analyzed. GTO inverter used for traction motor drive includes harmonics in the output current and torque by the limitation of switching frequency. However, the hybrid PWM method that adopt SPWM in the range of low frequency and SHE PWM in upper frequency range can achieve less harmonic characteristics in GTO inverters. If the traction motor is driven in variable speed by the proposed PWM pattern, 7 times of gear changing is needed. At the instant of the mode change, magnetic flux and torque may be altered and the large current flow. To reduce such an undesirable transient behavior, it is also presented the technique for the gear changing of inverter fed traction motor drive operated with the hybrid PWM. The results are verified by simulations and experiments.

• 전력전자학회논문지
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• 제4권4호
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• pp.325-331
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• 1999

계통연계형 태양광발전시스템에서는 계통과 태양광시스템을 연계하기 위해 PWM 인버터가 이용된다. 인버터 시스템을 연속전류모드로 운전하면 맥동이 발생하게 되고, 직류전류의 맥동발생은 교류전류파형의 왜형을 가져온다. 본 연구에서는 직류입력전류의 맥동을 감소시키기 위하여 불연속모드 승강압초퍼로 인버터를 운전한다. 직류 전류에 포함된 고조파성분을 리플성분과 직류성분으로 분리하여 해석하고, 맥동이 없는 일정한 직류전류를 태양 전지로부터 인버터로 공급한다. 제안하는 인버터시스템은 단위 역률로 부하와 계통에 교류전류를 공급한다.

• Journal of Power Electronics
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• 제17권1호
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• pp.88-95
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• 2017

To reduce common-mode voltage (CMV), various reduced CMV pulse width modulation (RCMV-PWM) algorithms have been proposed, including active zero state PWM (AZSPWM) algorithms, remote state PWM (RSPWM) algorithms, and near state PWM (NSPWM) algorithms. Among these algorithms, AZSPWM algorithms can reduce CMV, but they increase the number of switchings compared to the conventional space vector PWM (CSVPWM). This paper presents a new AZSPWM algorithm for reductions in both the CMV and total number of switchings in BLAC motor drives. Since the proposed AZSPWM algorithm uses only active voltage vectors for motor control, it reduces CMV by 1/3 compared to CSVPWM. The proposed AZSPWM algorithm also reduces the total number of switchings compared to existing AZSPWM algorithms by eliminating the switchings required from one sector to the next. The performance of the proposed algorithm is verified by analyses, simulations, and experimental results.

• 대한전기학회논문지:전기기기및에너지변환시스템부문B
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• 제54권11호
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• pp.540-546
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• 2005

This paper presents a boost circuit topology driving in high - frequency It solves the problem which arised from hard-switching in high-frequency using a period of resonant circuit and operating under the principle of ZCS turn-on and ZCZVS turn-off commutation schemes. In the existing circuit, it has the high voltage and current stress in free- wheeling diode. But in the proposed circuit, it has voltage and current stress which is lower than voltage and current stress of existing circuit with modifing a location of free-wheeling diode. In this paper, it explained the circuit operation of each mode and the waveform of each mode. Also the experiment results compare the voltage and current stress of free-wheeling diode in the existing circuit with the voltage and current stress of that in the proposed circuit. Moreover, it compares and analyzes the proposed circuit's efficiency with the existing circuit's efficiency according to the change of load current.