• 대한전자공학회논문지SD
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• 제49권8호
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• pp.35-40
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• 2012

DC-DC 컨버터에서 넓은 범위의 부하에 대하여 높은 효율을 유지하기 위해서는 PWM과 PFM을 함께 사용하는 듀얼 모드 제어 방식이 흔히 사용된다. 듀얼 모드 벅 컨버터는 부하 조건에 따라서 PWM이나 PFM을 선택해서 동작하므로, 모드 제어를 위한 부가 회로로 인하여 칩 면적이 증가하고 제어 방식이 변경되는 구간에서는 최적화된 효율을 얻을 수 없다. 본 논문에서는 전류 모드의 PWM 제어 회로에서 사용하는 발진기 대신에 PLL 기반의 발진기를 사용함으로써 추가적인 제어 회로 없이 PWM과 PFM의 통합된 제어 방식으로 동작하는 벅 컨버터를 제안함으로써 듀얼 모드 벅 컨버터의 단점을 해결했다. 제안한 통합 제어 방식의 벅 컨버터는 PSIM 시뮬레이션을 통하여 검증하였으며, 설계된 벅 컨버터 회로를 Cadence Spectre로 시뮬레이션 결과 250mA의 부하에서 최대 효율은 94.7%이고 10mA의 경부하에서 효율은 85.4%이다.

• 전력전자학회논문지
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• 제23권5호
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• pp.336-344
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• 2018

This study proposes a new PWM method for leakage current reduction and neutral point (NP) current control in three-phase three-level converter employed in bipolar DC distribution systems. The proposed PWM method uses medium vectors only when there is no need to control the NP current. Thus, common mode voltages are held constant to realize zero leakage current. Some space vectors that produce low-frequency common mode voltages are employed to minimize leakage currents when the average NP current needs to be a positive or negative value. The proposed space vector PWM is implemented based on barycentric coordinate. The validity of the proposed PWM method is verified by simulations and experiments.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2002년도 전력전자학술대회 논문집
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• pp.63-68
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• 2002

In a utility interactive photovoltaic generation system, a PWM inverter is used for the connection between the photovoltaic arrays and the utility. The do current becomes pulsated when the conventional inverter system operates in the continuous current mode and dc current pulsation causes the distortion of the ac current waveform. To reduce pulsation of dc input current, This paper presents a Buck-Boost PWM power inverter and its application for residential photovoltaic system. The PWM power inverter is realized by combining two sets of a high frequency Buck-Boost chopper and by making it operate in the discontinuous conduction mode. In this paper, we show the Buck-Boost PWM power inverter circuit, its equivalent circuit and basic differential equations and the power flow characteristics are clarified when the proposed Inverter is interconnected with the utility lines. In conclusion, the proposed inverter system provides a sinusoidal ac current for domestic loads and the utility line with unity power factor

• 전력전자학회논문지
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• 제21권1호
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• pp.27-33
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• 2016

A pulse-width modulation (PWM) method for common mode noise reduction in a PWM inverter connected to a single-phase grid is proposed in this study. The extensively used conventional switching method may experience common mode voltage problems, which generate current leakage and electromagnetic induction problems. In the proposed switching method, the neutral point of the output voltage is always fixed at both ends of the input voltage to reduce common mode noise. The validity of the proposed method is proven through simulation and experimental results.

• 대한전기학회논문지:전기기기및에너지변환시스템부문B
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• 제55권4호
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• pp.224-230
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• 2006

The conventional way to implement a bidirectional converter with boost/buck has been to use two general purpose PWM ICs with a single supply voltage. In this case, when one direction mode is in operation, the other is disabled and the output of the error amplifier of the disabled IC may be saturated to a maximum value or zero. Therefore, during mode transition, a circuit which can disable the switching operation for a certain time interval is required making it impossible to get a seamless transition. In this paper, the limitations of the conventional 42V/14V bi-directional DC/DC converter implemented with general current mode PWM ICs with a single supply voltage are reviewed and a new current mode PWM controller circuit with a dual voltage system is proposed. The validity of the proposed circuit is investigated through simulation. and experiments.

• 한국정보통신학회:학술대회논문집
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• 한국정보통신학회 2014년도 춘계학술대회
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• pp.152-155
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• 2014

ABS/ESC 기능 통합 SoC에 사용되는 자동차 제동 솔레노이드 밸브 구동용 디지털 PWM 컨트롤러를 설계하였다. 직접 제어와 PI 제어 방식을 지원하도록 설계된 PWM 컨트롤러는 총 12채널로 구성된다. 직접 제어 방식의 6개 채널은 설정된 PWM 듀티값에 따라 일정한 PWM을 출력하며, PI 제어 방식의 6개의 채널은 설정된 전류값을 기준으로 드라이버의 전류 값에 따라 변화하는 PWM을 출력하여 일정한 전류를 갖도록 설계되었다. 또한 솔레노이드 밸브 열림 감지, Dither, PWM 위상 시프트 기능 등을 갖는다. 설계된 PWM 컨트롤러는 44,779 게이트로 구현되었으며, 0.18um CMOS 공정으로 제작된 칩의 측정 결과로부터 기능이 정상적으로 동작하는 것을 확인하였다.

• Journal of Power Electronics
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• 제16권6호
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• pp.2045-2056
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• 2016

The input impedances of pulse width modulated (PWM) dc-to-dc converters, which dictate the outcomes of the dynamic interaction between dc-to-dc converters and their source subsystem, are analyzed in a general and unified manner. The input impedances of three basic PWM dc-to-dc converters are derived with both voltage mode control and current mode control. This paper presents the analytical expressions of the 24 input impedances of three basic PWM dc-to-dc converters with the two different control schemes in a factorized time-constant form. It also provides a comprehensive reference for future dynamic interaction analyses requiring knowledge of the converters' input impedances. The theoretical predictions of the paper are all supported by measurements on prototype dc-to-dc converters. The use of the presented results is demonstrated via a practical application example, which analyzes the small-signal dynamics of an input-filter coupled current-mode controlled buck converter. This elucidates the theoretical background for the previously-reported eccentric behavior of the converter.

• Journal of Power Electronics
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• 제16권6호
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• pp.2258-2271
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• 2016

In this paper, some crucial performance characteristics related to the operational reliability of the post-fault Pulse Width Modulated (PWM) rectifiers, such as line current harmonic distortion, Common Mode Voltage (CMV), and current stress on the capacitors, are fully investigated. The aforementioned performance characteristics of post-fault rectifiers are highly dependent on the utilized space vector modulation (SVM) schemes, which are also examined. Detailed analyses of the three most commonly used SVM schemes for post-fault PWM rectifiers are provided, revealing the major differences in terms of the zero vector synthesis approaches. To compare the performances of the three SVM schemes, the operating principles of a post-fault rectifier are presented with various SVM schemes. Using analytical and numerical methods in the time domain, the performances of the line current distortion, common mode voltage and capacitor current are evaluated and compared for each SVM scheme. The proposed analysis demonstrates that the zero vector synthesis approaches of the considered methods have significant impacts on the performance characteristics of rectifiers. In addition, the advantages and disadvantages of the proposed SVM schemes are discussed. The experimental results verify the effectiveness and validity of the proposed analysis.

• 한국조명전기설비학회:학술대회논문집
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• 한국조명전기설비학회 2002년도 학술대회논문집
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• pp.151-156
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• 2002

The output voltage of Synchronous Generator is regulated constantly by field current control in excitation system. A synchronous generator is equipped with an automatic voltage regulator(AVR), which is responsible for keeping the constant output voltage under normal operating conditions about various levels. High frequency PWM converter (Current Mode Control Buck converter) type excitation system for synchronous generator is able to sustain output voltage level properly when the fault condition happened. This paper deals with the design and evaluation of the excitation system controller for a synchronous generator to improve the steady state and transient stability. The simulation and experimental results show that the proposed excitation system is improve the respons time by the AVR(automatic voltage regulator) of 50kW synchronous generator that is applied the current mode control excitation system.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2008년도 하계종합학술대회
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• pp.599-600
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• 2008

This paper presents a high performance DC-DC boost converter by current-mode control method. As load current change, the converter change PWM/PFM operation automatically. current-mode DC-DC boost converter is implemented in a standard $0.35{\mu}m$ CMOS process. The peak efficiency was 94 % with a switching frequency of 1.2MHz.