• 제어로봇시스템학회:학술대회논문집
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• 제어로봇시스템학회 2001년도 ICCAS
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• pp.108.6-108
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• 2001

The basic circuit block diagram of CMOS current mode sum and subtract circuit is present in this paper. The purpose circuit consists of the invert current circuit and the basic current mirror. The outputs of the circuit are the summing of the both input current [lx+ly] and also the subtract of the both input current [lx+(-ly)]. The SPICE simulation results of the electrical characteristics with level 7 (BSIM3 model version 3.1) MOSFET transistor model of the circuit such as the input dynamic range, the frequency response and some system application have been shown and analyzed.

• 제어로봇시스템학회:학술대회논문집
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• 제어로봇시스템학회 2003년도 ICCAS
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• pp.970-973
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• 2003

Abstract An idea to redce the direct-path short circuit current of the CMOS digital integrated circuit is present. The sample circuit model of the CMOS digital circuit is the CMOS current-control digital output driver circuit, which are also suitable for the low voltage supply integrated circuits as the simple digital inverter, are present in this title. The circuit consists of active MOS load as the current control source, which construct from the saturated n-channel and p-channel MOSFET and the general CMOS inverter circuits. The saturated MOSFET bias can control the output current and the frequency response of the circuit. The experimental results show that lower short circuit current control can make the lower frequency response of the circuit.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1990년도 추계학술대회 논문집 학회본부
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• pp.73-77
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• 1990

In this paper we describe the solid-state ac-circuit breaker which has the characteristic of both a half cycle circuit breaker and a current limiting circuit breaker. This circuit breaker has a current limiting resistor in order to surprises the fault current to a certain level and discharge the energe included in circuit inductor. We explain the effect of circuit parameter on transient phenomena of switch device by using EMTP and finally design the control circuit consisted synchronous closing circuit, over- current detecting circuit and sensing circuit of rate of rise of fault current.

• 조명전기설비학회논문지
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• 제19권8호
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• pp.116-121
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• 2005

전류모드 아날로그 회로를 이용하여 FIR(Finite Impulse Response) 필터를 설계하는 경우에 tap coefficient와 전류모드 FFT(Fast Fourier Transform) LSI의 회전인자(twiddle factor)를 실현시키기 위해서는 높은 정밀도를 갖는 전류 감쇠 회로가 필요하게 된다. 본 논문은 전류 모드 신호처리 기술에서 전류감쇠 회로의 감쇠 정밀도를 향상시킬 수 있는 기술을 소개하고자한다. 먼저 게이트 길이 비율을 조정하는(gate-ratioed) Current Mirror 회로를 사용하는 기존의 전류 감쇠 조정회로에 있어서의 DC offset 전류 에러에 대하여 분석하였으며, 다음으로 DC offset 전류 에러를 제거할 수 있는 전류감쇠 회로를 제안하였다. 회로 구성은 입력 전류를 1/N로 감쇠시킬 수 있도록 N개의 Current Mirror를 병렬로 연결하는 기본 구성을 하였으며, Kirchhoff 전류 법칙에 근거하여, 전류 감쇠가 결정되도록 설계하였다. 또한 Current Mirror 회로에서, 정전류원의 사용을 줄일 수 있는 회로설계를 제안하였다. 제안된 전류 감쇠 회로에서 정밀도는 Current Mirror의 ac 이득 에러에 의하여 제한되며 High Swing Current Mirror를 기본 Current Mirror로 사용한 경우에, 최대 정밀도는 이론상 입력 전류의 -80[dB]까지 실현가능하다.

• 전기학회논문지P
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• 제63권1호
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• pp.12-18
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• 2014

This paper analyzes how to calculate the three phase short circuit current calculation procedures used in the IEC 60909 short circuit. It presented the new procedure of the fault current for the interrupting capacity of the circuit breaker. This procedure is applied to the future power system and calculates the fault current. Power demands are increased because of the growth of the economy for this reason, the fault current of the power system is largely increased and the fault current procedure for the proper interrupting capacity calculation of the existing or the new circuit breaker is essential. How to calculate the three phase short circuit current for ac electrical system and select the high voltage and low voltage circuit breaker based on IEC 60909 standards.

• 한국전기전자재료학회논문지
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• 제30권1호
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• pp.37-41
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• 2017

In this paper, the fault current limiting characteristics of the flux-lock type SFCL (superconducting fault current limiter) using magnetic application circuit were analyzed. The flux-lock type SFCL has the structure to install the magnetic application circuit, which can increase the resistance of HTSC ($high-T_C$ superconducting element comprising) the SFCL. To analyze the fault current limiting effect of the flux-lock type SFCL through the magnetic flux application circuit, the flux-lock type SFCL either with the magnetic flux circuit or without the magnetic flux circuit was constructed and the fault current limiting characteristics of the SFCL were compared each other through the short-circuit tests.

• 한국초전도ㆍ저온공학회논문지
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• 제18권4호
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• pp.30-34
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• 2016

In this study, a SFCL-combined DC circuit breaker system was proposed by applying the current-limiting technology for DC circuit breaking. The SFCL-combined circuit breaker system consists of a mechanical DC circuit breaker combined with superconductors. To ensure the reliable structure and operation of the SFCL-combined circuit breaker system, a simulation grid was designed using the EMTDC/PSCAD program, and simulation was conducted. The results showed that the SFCL-combined DC circuit breaker system with superconductors limited the maximum fault current by 37%. In addition, the burden on the DC circuit breaker was decreased by 87%.

• 전력전자학회논문지
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• 제26권3호
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• pp.214-221
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• 2021

SiC MOSFETs require a faster and more reliable short-circuit protection circuit than conventional methods due to narrow short-circuit withstand times. Therefore, this research proposes a short-circuit protection circuit using a current-sensing circuit based on Rogowski coil. The method of designing the current-sensing circuit, which is a component of the proposed circuit, is presented first. The integrator and input/output filter that compose the current-sensing circuit are designed to have a wide bandwidth for accurately measuring short-circuit currents with high di/dt. The precision of the designed sensing circuit is verified on a double pulse test (DPT). In addition, the sensing accuracy according to the bandwidth of the filters and the number of turns of the Rogowski coil is analyzed. Next, the entire short-circuit protection circuit with the current-sensing circuit is designed in consideration of the fast short-circuit shutdown time. To verify the performance of this circuit, a short-circuit test is conducted for two cases of short-circuit conditions that can occur in the half-bridge structure. Finally, the short-circuit shutdown time is measured to confirm the suitability of the proposed protection circuit for the SiC MOSFET short-circuit protection.

• 한국전기전자재료학회논문지
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• 제25권1호
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• pp.53-57
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• 2012

In this paper, by designing 20 W class driving circuit for driving high-power LED (Light Emitting Diode), we are going to comparatively carry out the analysis of characteristics for power circuit according to each design method. In this case, 200 V 60 Hz was performed as input data. The electrical characteristics such as voltage, current and ripple are checked for constant current circuit and constant voltage circuit in the LED module. In addition, as the ripple has an influence on illumination of LED light, low temperature working (-20 [$^{\circ}C$]) and high temperature working(80 [$^{\circ}C$]) are measured to make sure the ripple characteristics in accordance with temperature. In low temperature operation -20 [$^{\circ}C$] measurements, both constant current circuit and constant-voltage circuit were less impacted on input fluctuation, whereas in the high temperature operation 80 [$^{\circ}C$], current voltage in constant voltage circuit was surge after 430 [hour]. Voltage current ripple of constant current circuit was much less than constant voltage circuit, therefore we can show that constant current circuit is more stable.

• 대한전기학회논문지:전력기술부문A
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• 제50권3호
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• pp.146-152
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• 2001

This paper describes an accurate fault location algorithm based on sequence current distribution factors for a double-circuit transmission system. The proposed method uses the voltage and current collected at only the local end of a single-circuit. This method is virtually independent of the fault resistance and the mutual coupling effect caused by the zero-sequence current of the adjacent parallel circuit and insensitive to the variation of source impedance. The fault distance is determined by solving the forth-order KVL(Kirchhoff's Voltage Law) based distance equation. The zero-sequence current of adjacent circuit is estimated by using a zero-sequence current distribution factor and the zero-sequence current of the self-circuit. Thousands of fault simulation by EMTP have proved the accuracy and effectiveness of the proposed algorithm.