• Journal of the Microelectronics and Packaging Society
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• v.29 no.4
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• pp.41-47
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• 2022

Ag sintering technologies have received great attention as it was applied to the inverter of Tesla's electric vehicle Model III. Ag sinter bonding technology has advantages in heat dissipation design as well as high-temperature stability due to the intrinsic properties of the material, so it is useful for practical use of SiC and GaN devices. This study was carried out to understand the sinter joining temperature effect on the robust Ag sintered joints in air without pressure within 10 min. Electroplated Ag finished Cu dies (3 mm × 3 mm × 2 mm) and substrates (10 mm × 10 mm × 2 mm) were introduced, respectively, and nano Ag paste was applied as a bonding material. The sinter joining process was performed without pressure in air with the bonding temperature as a variable of 175 ℃, 200 ℃, 225 ℃, and 250 ℃. As results, the bonding temperature of 175 ℃ caused 13.21 MPa of die shear strength, and when the bonding temperature was raised to 200 ℃, the bonding strength increased by 157% to 33.99 MPa. When the bonding temperature was increased to 225 ℃, the bonding strength of 46.54 MPa increased by about 37% compared to that of 200 ℃, and even at a bonding temperature of 250 ℃, the bonding strength exceeded 50 MPa. The bonding strength of Ag sinter joints was directly influenced by changes in the necking thickness and interfacial connection ratio. In addition, developments in the morphologies of the joint interface and porous structure have a significant effect on displacement. This study is systematically discussed on the relationship between processing temperatures and bonding strength of Ag sinter joints.

• Journal of the Korean Society for Precision Engineering
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• v.31 no.10
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• pp.865-871
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• 2014

Paradigm shift to 3-D chip stacking in electronic packaging has induced a lot of integration challenges due to the reduction in wafer thickness and pitch size. This study presents a hybrid bonding technology by self-alignment effect in order to improve the flip chip bonding accuracy with ultra-thin wafer. Optimization of Cu pillar bump formation and evaluation of various factors on self-alignment effect was performed. As a result, highly-improved bonding accuracy of thin wafer with a $50{\mu}m$ of thickness was achieved without solder bridging or bump misalignment by applying reflow process after thermo-compression bonding process. Reflow process caused the inherently-misaligned micro-bump to be aligned due to the interface tension between Si die and solder bump. Control of solder bump volume with respect to the chip dimension was the critical factor for self-alignment effect. This study indicated that bump design for 3D packaging could be tuned for the improvement of micro-bonding quality.

• ETRI Journal
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• v.41 no.3
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• pp.396-407
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• 2019

Laser-assisted bonding (LAB) is an advanced technology in which a homogenized laser beam is selectively applied to a chip. Previous researches have demonstrated the feasibility of using a single-tier LAB process for 3D through-silicon via (TSV) integration with nonconductive paste (NCP), where each TSV die is bonded one at a time. A collective LAB process, where several TSV dies can be stacked simultaneously, is developed to improve the productivity while maintaining the reliability of the solder joints. A single-tier LAB process for 3D TSV integration with NCP is introduced for two different values of laser power, namely 100 W and 150 W. For the 100 W case, a maximum of three dies can be collectively stacked, whereas for the 150 W case, a total of six tiers can be simultaneously bonded. For the 100 W case, the intermetallic compound microstructure is a typical Cu-Sn phase system, whereas for the 150 W case, it is asymmetrical owing to a thermogradient across the solder joint. The collective LAB process can be realized through proper design of the bonding parameters such as laser power, time, and number of stacked dies.

• The Journal of the Acoustical Society of Korea
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• v.33 no.2
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• pp.102-110
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• 2014

The effect of a bonding layer on the performance of a quarter-wave (${\lambda}/4$) mode PVDF ultrasound transducer having not only a piezoelectric layer but also a non-piezoelectric layer between two electrodes was analyzed. The equivalent circuit of a transmission line model by Kikuchi et al.[Sound of IEICE, 55-A, 331-338 (1981)] was introduced for the analysis. The validity of the model was confirmed by comparison with a KLM model for three postulated adhesion cases of a $80{\mu}m$ thick piezoelectric PVDF film to a copper (Cu) backer. The pulse-echo responses of five PVDF transducers, each fabricated with a different thickness ($5{\mu}m{\sim}20{\mu}m$) of the bonding layer, were measured and the results were compared with those by simulation. The two results were in good agreement with each other and it was noted that the effect of the bonding layer on the performance of the transducer could be analyzed by the Kikuchi model. In detail, the $20{\mu}m$ bonding layer decreased the center frequency and the bandwidth by about 19.7 % and 25.0 %, respectively, and increased the insertion loss by 57.2 %.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.24 no.12
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• pp.949-954
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• 2011

In this study, the characteristics and error ranges of the mechanical bonding strength were analyzed according to before and after thermal shock test for various chips of automotive application component using Sn-3.0Ag-0.5Cu solder. In the after thermal shock test, the mechanical bonding strengths tend to decrease, meanwhile decreasing rates of mechanical strengths were less then 12% at specimen's bonding area below 3.5$mm^2$, and were from 17 to 21% at specimen's bonding area above 12 $mm^2$. On the other hand, Specimen's mean deviation rates were about 5% at specimen's bonding area more than 12 $mm^2$. Inversely, at specimen's bonding area is less then 3.5 $mm^2$, mean deviation rates were increased to about 8%. It means that the smaller device size is, the larger mean deviation rate. In addition, error ranges and deviation rates of the mechanical bonding strengths may differ slightly depending on their bonding area. Furthermore, process conditions as well as method of mechanical reliability evaluation should be established to reduce the error ranges of bonding strength.

• Korean Journal of Materials Research
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• v.6 no.2
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• pp.210-220
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• 1996

The purpose of this study is to develop the processing techniques of Fiber Reinforced Metal by Liquid Phase Diffusion Bonding method with SiC fiber as a reinforcing material and CP Ti(Commercial Pure) as a matrix. The microstructure and the distribution of elements in reaction and CP Ti(Commercial Pure) as a matrix. The microstructure and the distribution of elements is reaction zone among CP Ti/Ti-15wt%Cu-20wt%Ni(TCN20)/SiC long fiber were investigated by Optical Microscope, SEM/EDX, EPMA, X-ray and AES. The results obtained in this study are as follows. 1) When Ti matrix composite materials are fabricated under the bonding condition of 1273Kx1200sec, the SiC long fiber was the most suitable reinforcing material for Ti matrix composite materials. 2) With SiC long fiber under same condition, a TiC layer(1.0-1.6$\mu\textrm{m}$) was observed on the surface of SiC long fiber. 3) Liquid Phase Diffusion Bonding has shown the feasibility of production of Ti matrix composite materials.

• Journal of the Semiconductor & Display Technology
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• v.10 no.4
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• pp.37-42
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• 2011

In this paper, novel carbon nanotube (CNT)-filled Solderable electrically conductive adhesive (ECA) and joining process have been developed. To investigate the bonding characteristics of CNT-filled Solderable ECA, three types of Solderable ECAs with different CNT weight percent (0, 0.1, 1wt%) were formulated. For a joining process, the quad flat package (QFP) chip was used. The QFP chip had a size of $14{\times}14{\times}2.7$ mm and a 1 mm lead pitch. The test board had a Cu daisy-chained pattern with 18 ${\mu}m$ thick. After the bonding process, the bonding characteristics such as morphology of conduction path, electrical resistance and pull strength were measured for each formulated ECAs. As a result, the electrical and mechanical bonding characteristics for a QFP joints using CNT-filled ECA were improved about 10% compared to those of QFP joints using ECA without CNT.

• Journal of the Microelectronics and Packaging Society
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• v.12 no.3 s.36
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• pp.197-205
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• 2005

Development of the packaging is one of the critical issues for commercialization of the RF-MEMS devices. RF MEMS package should be designed to have small size, hermetic protection, good RF performance and high reliability. In addition, packaging should be conducted at sufficiently low temperature. In this paper, a low temperature hermetic wafer level packaging scheme for the RF-MEMS devices is presented. For hermetic sealing, Au-Sn eutectic bonding technology at the temperature below $300{\times}C$ is used. Au-Sn multilayer metallization with a square loop of $70{\mu}m$ in width is performed. The electrical feed-through is achieved by the vertical through-hole via filled with electroplated Cu. The size of the MEMS Package is $1mm\times1mm\times700{\mu}m$. By applying $O_2$ plasma ashing and fabrication process optimization, we can achieve the void-free structure within the bonding interface as well as via hole. The shear strength and hermeticity of the package satisfy the requirements of MIL-STD-883F. Any organic gases or contamination are not observed inside the package. The total insertion loss for the packaging is 0.075 dB at 2 GHz. Furthermore, the robustness of the package is demonstrated by observing no performance degradation and physical damage of the package after several reliability tests.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 1993.11a
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• pp.49-54
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• 1993

This paper discusses the reliability of solder joints of electronic devices on printed circuit board. Solder application is usually done by screen printing method for the bonding between outer leads of devices and thick film(Ag/Pd) pattern on Hybrid IC as wel1 as Cu lands on PCB. As result of thermal stresses generated at the solder joints due to the differences of thermal expansion coefficients between packge body and PCB, Micro cracking often occurs due to thermal fatigue failure at solder joints. The initiation and the propagate of solder joint crack depends on the environmental conditions, such as storage temperature and thermal cycling. The principal mechanisms of the cracking pheno- mana are the formation of kirkendal void caused by the differences in diffusion rate of materials, ant the thermal fatigue effect due to the differences of thermal expansion coefficient between package body and PCB. Finally, This paper experimentally shows a way to supress solder joints cracks by using low-${\alpha}$ PCB and the packages with thin lead frame, and investigates the phenomena of diffusion near the bonding interfaces.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2003.04a
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• pp.203-205
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• 2003

레이저 다이오드를 p-side-down 방식으로 본딩하기 위하여 AuSn 솔더합금을 증착한 후 온도와 압력, 시간을 변화시켜 본딩상태를 조사하였다. CuW위에 adhsion layer와 확산방지층을 각각 $500{\AA}$과 $2000{\AA}$을 증착하였으며 솔더층으로 AuSn을 $2.6{\mu}m$ 증착 하였다. 열처리는 질소 분위기에서 행하였으며, 표면의 거칠기는 AFM으로 측정하였다.