• Journal of Sensor Science and Technology
• /
• v.21 no.1
• /
• pp.34-38
• /
• 2012

We have developed a cost effective test socket for ball grid array(BGA) integrated circuit(IC) packages using BeCu metal sheet as a test probe. The BeCu furnishes the best combination of electrical conductivity and corrosion resistance. The probe of the test socket was designed with a BeCu cantilever. The cantilever was designed with a length of 450 ${\mu}m$, a width of 200 ${\mu}m$, a thickness of 10 ${\mu}m$, and a pitch of 650 ${\mu}m$ for $11{\times}11$ BGA. The fabrication of the test socket used techniques such as through-silicon-via filling, bonding silicon wafer and BeCu metal sheet with dry film resist(DFR). The test socket is applicable for BGA IC chip.

• Korean Journal of Materials Research
• /
• v.20 no.8
• /
• pp.434-438
• /
• 2010

The selenization process has been a promising method for low-cost and large-scale production of high quality CIGS film. However, there is the problem that most Ga in the CIGS film segregates near the Mo back contact. So the solar cell behaves like a $CuInSe_2$ and lacks the increased open-circuit voltage. In this study we investigated the Ga distribution in CIGS films by using the $Ga_2Se_3$ layer. The $Ga_2Se_3$ layer was applied on the Cu-In-Ga metal layer to increase Ga content at the surface of CIGS films and to restrict Ga diffusion to the CIGS/Mo interface with Ga and Se bonding. The layer made by thermal evaporation was showed to an amorphous $Ga_2Se_3$ layer in the result of AES depth profile, XPS and XRD measurement. As the thickness of $Ga_2Se_3$ layer increased, a small-grained CIGS film was developed and phase seperation was showed using SEM and XRD respectively. Ga distributions in CIGS films were investigated by means of AES depth profile. As a result, the [Ga]/[In+Ga] ratio was 0.2 at the surface and 0.5 near the CIGS/Mo interface when the $Ga_2Se_3$ thickness was 220 nm, suggesting that the $Ga_2Se_3$ layer on the top of metal layer is one of the possible methods for Ga redistribution and open circuit voltage increase.

• Journal of the Microelectronics and Packaging Society
• /
• v.26 no.3
• /
• pp.81-88
• /
• 2019

In this study, the effects of graphene oxide (GO) addition on electromigration (EM) lifetime of Sn-3.0Ag-0.5Cu Pb-free solder joint between a ball grid array (BGA) package and printed circuit board (PCB) were investigated. After as-bonded, $(Cu,Ni)_6Sn_5$ intermetallic compound (IMC) was formed at the interface of package side finished with electroplated Ni/Au, while $Cu_6Sn_5$ IMC was formed at the interface of OSP-treated PCB side. Mean time to failure of solder joint without GO solder joint under $130^{\circ}C$ with a current density of $1.0{\times}10^3A/cm^2$ was 189.9 hrs and that with GO was 367.1 hrs. EM open failure was occurred at the interface of PCB side with smaller pad diameter than that of package side due to Cu consumption by electrons flow. Meanwhile, we observed that the added GO was distributed at the interface between $Cu_6Sn_5$ IMC and solder. Therefore, we assumed that EM reliability of solder joint with GO was superior to that of without GO by suppressing the Cu diffusion at current crowding regions.

• Applied Science and Convergence Technology
• /
• v.23 no.1
• /
• pp.14-26
• /
• 2014

Copper is an important component from coin metal to electronic wire, integrated circuit, and to lithium battery. Copper oxides, mainly including $Cu_2O$ and CuO, are important semiconductors for the wide applications in solar cell, catalysis, lithium-ion battery, and sensor. Due to their low cost, low toxicity, and easy synthesis, copper oxides have received much research interest in recent year. Herein, we review the crystallization of copper oxides by designing various chemical reaction routes, for example, the synthesis of $Cu_2O$ by reduction route, the oxidation of copper to $Cu_2O$ or CuO, the chemical transformation of $Cu_2O$ to CuO, the chemical precipitation of CuO. In the designed reaction system, ligands, pH, inorganic ions, temperature were used to control both chemical reactions and the crystallization processes, which finally determined the phases, morphologies and sizes of copper oxides. Furthermore, copper oxides with different structures as electrode materials for lithium-ion batteries were also reviewed. This review presents a simple route to study the reaction-crystallization-performance relationship of Cu-based materials, which can be extended to other inorganic oxides.

• Korean Chemical Engineering Research
• /
• v.48 no.5
• /
• pp.654-659
• /
• 2010

We have investigated the effect of rubrene-doped CuPc hole transport layer on the performance of p-i-n type bulk hetero-junction photovoltaic device with a structure of ITO/PEDOT:PSS/CuPc: rubrene/CuPc:C60(blending ratio 1:1)/C60/BCP/Al and have evaluated the current density-voltage(J-V) characteristics, short-circuit current($J_{sc}$), open-circuit voltage($V_{oc}$), fill factor(FF), and energy conversion efficiency(${\eta}_e$) of the device. By rubrene doping into CuPc hole transport layer, absorption intensity in absorption spectra decreased. However, the performance of p-i-n organic type bulk hetero-junction photovoltaic device fabricated with crystalline rubrene-doped CuPc was improved since rubrene shows higher bandgap and hole mobility compared to CuPc. Increased injection currents have effected on the performance improvement of the present device with energy conversion efficiency(${\eta}_e$) of 1.41%, which is still lower value compared to silicone solar cell and many efforts should be made to improve organic photovoltaic devices.

• Journal of the Microelectronics and Packaging Society
• /
• v.23 no.2
• /
• pp.73-78
• /
• 2016

An increase in the transistor density of integrated circuit devices leads to a very high increase in heat dissipation density, which causes a long-term reliability and various thermal problems in microelectronics. In this study, liquid cooling method was investigated using straight microchannels with various metal bumps. Microchannels were fabricated on Si wafer using deep reactive ion etching (DRIE), and Ag, Cu, or Cr/Au/Cu metal bumps were placed on Si wafer by a screen printing method. The surface temperature of liquid cooling structures with various metal bumps was measured by infrared (IR) microscopy. For liquid cooling with Cr/Au/Cu bumps, the surface temperature difference before and after liquid cooling was $45.2^{\circ}C$ and the power density drop was $2.8W/cm^2$ at $200^{\circ}C$ heating temperature.

• Korean Journal of Materials Research
• /
• v.24 no.2
• /
• pp.105-110
• /
• 2014

The aim of this work was to investigate the effects of electrodeposition conditions on the microstructural characteristics of copper thin films. The microstructure of electroplated Cu films was found to be highly dependent on electrodeposition conditions such as system current and current density, as well as the bath solution itself. The current density significantly changed the preferred orientation of electroplated Cu films in a DC system, while the solution itself had very significant effects on microstructural characteristics in a pulse-reverse pulse current system. In the DC system, polarization at high current above 30 mA, changed the preferred orientation of Cu films from (220) to (111). However, Cu films showed (220) preferred orientation for all ranges of current density in the pulse-reverse pulse current system. The grain size decreased with increasing current density in the DC system while it remained relatively constant in the pulse-reverse pulse current system. The sheet resistance increased with increasing current density in the DC system due to the decreased grain size.

• Korean Journal of Materials Research
• /
• v.26 no.2
• /
• pp.84-89
• /
• 2016

We present the rectifying and nitrogen monoxide (NO) gas sensing properties of an oxide semiconductor heterostructure composed of n-type zinc oxide (ZnO) and p-type copper oxide thin layers. A CuO thin layer was first formed on an indium-tin-oxide-coated glass substrate by sol-gel spin coating method using copper acetate monohydrate and diethanolamine as precursors; then, to form a p-n oxide heterostructure, a ZnO thin layer was spin-coated on the CuO layer using copper zinc dihydrate and diethanolamine. The crystalline structures and microstructures of the heterojunction materials were examined using X-ray diffraction and scanning electron microscopy. The observed current-voltage characteristics of the p-n oxide heterostructure showed a non-linear diode-like rectifying behavior at various temperatures ranging from room temperature to $200^{\circ}C$. When the spin-coated ZnO/CuO heterojunction was exposed to the acceptor gas NO in dry air, a significant increase in the forward diode current of the p-n junction was observed. It was found that the NO gas response of the ZnO/CuO heterostructure exhibited a maximum value at an operating temperature as low as $100^{\circ}C$ and increased gradually with increasing of the NO gas concentration up to 30 ppm. The experimental results indicate that the spin-coated ZnO/CuO heterojunction structure has significant potential applications for gas sensors and other oxide electronics.

• ETRI Journal
• /
• v.45 no.5
• /
• pp.910-921
• /
• 2023

In this study, we designed a 6T-SRAM cell using 16-nm CMOS process and analyzed the performance in terms of read-speed latency. The temperaturedependent Cu and multilayered graphene nanoribbon (MLGNR)-based nanointerconnect materials is used throughout the circuit (primarily bit/bit-bars [red lines] and word lines [write lines]). Here, the read speed analysis is performed with four different chip operating temperatures (150K, 250K, 350K, and 450K) using both Cu and graphene nanoribbon (GNR) nano-interconnects with different interconnect lengths (from 10 ㎛ to 100 ㎛), for reading-0 and reading-1 operations. To execute the reading operation, the CMOS technology, that is, the16-nm PTM-HPC model, and the16-nm interconnect technology, that is, ITRS-13, are used in this application. The complete design is simulated using TSPICE simulation tools (by Mentor Graphics). The read speed latency increases rapidly as interconnect length increases for both Cu and GNR interconnects. However, the Cu interconnect has three to six times more latency than the GNR. In addition, we observe that the reading speed latency for the GNR interconnect is ~10.29 ns for wide temperature variations (150K to 450K), whereas the reading speed latency for the Cu interconnect varies between ~32 ns and 65 ns for the same temperature ranges. The above analysis is useful for the design of next generation, high-speed memories using different nano-interconnect materials.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
• /
• v.29 no.6
• /
• pp.365-369
• /
• 2016

In this paper, we fabricated Cu/Mn alloy shunt resistor with low resistance and thermal stability for use of mobile electronic devices. We designed metal alloy composed of copper (Cu) and manganese (Mn) to embody in low resistance and low TCR which are conflict each other. Cu allows high electrical conductivity and Mn serves thermal stability in this Cu/Mn alloy system. We confirmed the elemental composition of the designed metal alloy system by using energy dispersive X-ray (EDX) analysis. We obtained low resistance below $10m{\Omega}$ and low temperature coefficient of resistance (TCR) below $100ppm/^{\circ}C$ from the designed Cu/Mn alloy resistor. And in order to minimize resistance change caused by alternative frequency on circuit, shape design of the metal alloy wire is performed by rolling process. Finally, we conclude that design of the metal alloy system was successfully done by alloying Cu and 3 wt% of Mn, and the Cu/Mn alloy resistor has low resistance and thermal stability.