• Title/Summary/Keyword: Cryptographic Algorithm

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IPC-based Dynamic SM management on GPGPU for Executing AES Algorithm

  • Son, Dong Oh;Choi, Hong Jun;Kim, Cheol Hong
    • Journal of the Korea Society of Computer and Information
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    • v.25 no.2
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    • pp.11-19
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    • 2020
  • Modern GPU can execute general purpose computation on the graphic processing unit, and provide high performance by exploiting many core on GPU. To run AES algorithm efficiently, parallel computational resources are required. However, computational resource of CPU architecture are not enough to cryptographic algorithm such as AES whereas GPU architecture has mass parallel computation resources. Therefore, this paper reduce the time to execute AES by employing parallel computational resource on GPGPU. Unfortunately, AES cannot utilize computational resource on GPGPU since it isn't suitable to GPGPU architecture. In this paper, IPC based dynamic SM management technique are proposed to efficiently execute AES on GPGPU. IPC based dynamic SM management can increase and decrease the number of active SMs by using IPC in run-time. According to simulation results, proposed technique improve the performance by increasing resource utilization compared to baseline GPGPU architecture. The results show that AES improve the performance by 41.2% on average.

Side-Channel Analysis Based on Input Collisions in Modular Multiplications and its Countermeasure (모듈라 곱셈의 충돌 입력에 기반한 부채널 공격 및 대응책)

  • Choi, Yongje;Choi, Dooho;Ha, Jaecheol
    • Journal of the Korea Institute of Information Security & Cryptology
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    • v.24 no.6
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    • pp.1091-1102
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    • 2014
  • The power analysis attack is a cryptanalytic technique to retrieve an user's secret key using the side-channel power leakage occurred during the execution of cryptographic algorithm embedded on a physical device. Especially, many power analysis attacks have targeted on an exponentiation algorithm which is composed of hundreds of squarings and multiplications and adopted in public key cryptosystem such as RSA. Recently, a new correlation power attack, which is tried when two modular multiplications have a same input, is proposed in order to recover secret key. In this paper, after reviewing the principle of side-channel attack based on input collisions in modular multiplications, we analyze the vulnerability of some exponentiation algorithms having regularity property. Furthermore, we present an improved exponentiation countermeasure to resist against the input collision-based CPA(Correlation Power Analysis) attack and existing side channel attacks and compare its security with other countermeasures.

A Digital Image Watermarking Scheme using ElGamal Function (ElGarnal함수를 사용하는 디지털 이미지 워터마킹 기법)

  • Lee, Jean-Ho;Kim, Tai-Yun
    • The KIPS Transactions:PartC
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    • v.9C no.1
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    • pp.1-8
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    • 2002
  • Digital image watermarking is a technique for the purpose of protecting the ownership of the image by embedding proprietary watermarks in a digital image. It is required for the digital image watermarking scheme to pursue the robustness against water marking attacks and the perceptual Invisibility more than usual in steganography area, to guarantee not a hidden watermarking algorithm but the publicity of water-marking algorithm details and hidden use of key, which can protect the unauthorized user access from detection. In this paper we propose a new copyright watermarking scheme, which is barred on one-way hash functions using ElGamal functions and modular operations. ElGamal functions are widely used in cryptographic systems. Our watermarking scheme is robust against LSB(least significant bit) attacks and gamma correction attack, and also perceptually invisible. We demonstrate the characteristics of our proposed watermarking scheme through experiments. It is necessary to proceed as the future work the algorithm of achieving at the same time both the pseudo-randomness for the steno-key generation and the asymmetric-key generation.

Enhancing Security of Transaction Session in Financial Open API Environment Using Hybrid Session Protection Protocol Combined with NTRU (NTRU를 결합한 하이브리드 세션 보호 프로토콜을 이용한 금융 오픈 API 환경의 거래 세션 안전성 강화)

  • Sujin Kwon;Deoksang Kim;Yeongjae Park;Jieun Ryu;Ju-Sung Kang;Yongjin Yeom
    • Journal of the Korea Institute of Information Security & Cryptology
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    • v.33 no.1
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    • pp.75-86
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    • 2023
  • Public key cryptography algorithm such as RSA and ECC, which are commonly used in current financial transaction services, can no longer guarantee security when quantum computers are realized. Therefore it is necessary to convert existing legacy algorithms to Post-Quantum Cryptography, but it is expected that will take a considerable amount of time to replace them. Hence, it is necessary to study a hybrid method combining the two algorithms in order to prepare the forthcoming transition period. In this paper we propose a hybrid session key exchange protocol that generates a session key by combining the legacy algorithm ECDH and the Post-Quantum Cryptographic algorithm NTRU. We tried the methods that proposed by the IETF for TLS 1.3 based hybrid key exchange, and as a result, it is expected that the security can be enhanced by applying the protocol proposed in this paper to the existing financial transaction session protection solution.

Mechanism of RFID Authentication for u-Vehicle (u-Vehicle 환경에 적합한 RFID 인증 메커니즘)

  • Rhee, Yoon-Jung;Kim, Do-Hyeon
    • The Journal of the Korea Contents Association
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    • v.8 no.6
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    • pp.66-73
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    • 2008
  • The concept of u-Vehicle is a technological model that people try to build the ubiquitous world in the car which moves, by using the RFID technology as well as the telematics service based on the location. RFID is weak on the point of information security because RFID has possibility for being abused such as chasing, counterfeiting, and invading personal privacy. RFID's tags use a weak cryptographic algorithm. This paper presents the vulnerabilities of information security under u-Vehicle environments. To solve that, we propose a mechanism enhancing RFID tag's security but with low cost by reducing the number of mutual authentication stages and using the hash function.

Efficient Fault Tolerant Key Agreement for Ad-Hoc (Ad-Hoc 네트워크에서 링크 장애를 고려한 효율적인 키 협정 방법)

  • Lee, Young-Jun;Min, Sung-Gi;Lee, Sung-Jun
    • The Journal of Korean Association of Computer Education
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    • v.7 no.1
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    • pp.45-53
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    • 2004
  • Ad-Hoc network is wireless network architecture without infrastructure. We encounter new types of security problems in Ad-Hoc networks because such networks have little or no support from infrastructure. Thus, wireless communications need security mechanisms in order to guarantee the integrity and the privacy of the communication, as well as the authentication of the entities involved. Many practical systems have been proposed. The most familiar system is the Diffie-Hellman key distribution system. This algorithm allows the establishment of a cryptographic secret key between two entities. If more than two users want to compute a common key, then a group key agreement system is used. This paper discusses several group key agreement systems and presents two efficient fault tolerant methods to perform successful group key agreement.

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An Implementation of Security Key Management System by LDAP (LDAP을 이용한 보안 키 관리 시스템 구현)

  • Yoon, Sung-Jung;Kim, Geon-Ung
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.10 no.3
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    • pp.437-445
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    • 2006
  • The security key management function is a key element to secure network environment, and many protocols include IPSec, HIP, etc. demand this function. There are two solutions to provide the key management function in the network layer, one is a method for storing security key material in the directory, and the other is a method for storing security key material in DNS. In this paper we present an implementation of key management system by LDAP. We deployed the open source solutions for directory service(OpenLDAP), cryptographic algorithm (FLINT/C), IPSec(FreeS/WAN), and verified the key management system by the encrypted message exchange and the interoperability test by un daemon.

Design of Linear Systolic Arrays of Modular Multiplier for the Fast Modular Exponentiation (고속 모듈러 지수연산을 위한 모듈러 곱셈기의 선형 시스톨릭 어레이 설계)

  • Lee, Geon-Jik;Heo, Yeong-Jun;Yu, Gi-Yeong
    • Journal of KIISE:Computer Systems and Theory
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    • v.26 no.9
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    • pp.1055-1063
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    • 1999
  • 공개키 암호화 시스템에서 주된 연산은 512비트 이상의 큰 수에 의한 모듈러 지수 연산으로 표현되며, 이 연산은 내부적으로 모듈러 곱셈을 반복적으로 수행함으로써 계산된다. 본 논문에서는 Montgomery 알고리즘을 분석하여 right-to-left 방식의 모듈러 지수 연산에서 공통으로 계산 가능한 부분을 이용하여 모듈러 제곱과 모듈러 곱셈을 동시에 수행하는 선형 시스톨릭 어레이를 설계한다. 설계된 시스톨릭 어레이는 VLSI 칩과 같은 하드웨어로 구현함으로써 IC 카드나 smart 카드에 이용될 수 있다.Abstract The main operation of the public-key cryptographic system is represented the modular exponentiation containing 512 or more bits and computed by performing the repetitive modular multiplications. In this paper, we analyze Montgomery algorithm and design the linear systolic array for performing modular multiplication and modular squaring simultaneously using the computable part in common in right-to-left modular exponentiation. The systolic array presented in this paper could be designed on VLSI hardware and used in IC and smart card.

Proposed measure for Smart Grid's Personal Information Security Issue (스마트 그리드 개인정보 보안이슈 방안 제시)

  • Choi, Heesik;Cho, Yanghyun
    • Journal of Korea Society of Digital Industry and Information Management
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    • v.12 no.4
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    • pp.41-49
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    • 2016
  • Smart Grid is a next generation of new power growth electrical grid which provide high quality of electrical service by using Information Technologies to increase intelligence and performance. By using Smart Grid system, it can support energy management such as increase quality of electrical power, decrease energy and decrease emissions. However, Smart Grid uses information of energy consumption and when Smart Grid collects information, it will create private information. In this thesis, it will address issues of security private information which caused by Smart Grid for administrative measure and efficiency of Smart Grid in domestic. Also, cryptographic module algorithm, latest security solutions and strong wireless security policy for network environment such as wireless communication Iinternet are require for Smart Grid perform successfully and protect national power network equipment from cyber-attack and can stop leakage of user's personal information. Finally, it is urgent to prepare protection measures of National industrial facilities and power grid which can prepare for a cyber terrorism and penetration attacks and build emergency countermeasure management team for Smart Grid are require for safe Smart Grid environment.

Design and Implementation of a Sequential Polynomial Basis Multiplier over GF(2m)

  • Mathe, Sudha Ellison;Boppana, Lakshmi
    • KSII Transactions on Internet and Information Systems (TIIS)
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    • v.11 no.5
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    • pp.2680-2700
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    • 2017
  • Finite field arithmetic over GF($2^m$) is used in a variety of applications such as cryptography, coding theory, computer algebra. It is mainly used in various cryptographic algorithms such as the Elliptic Curve Cryptography (ECC), Advanced Encryption Standard (AES), Twofish etc. The multiplication in a finite field is considered as highly complex and resource consuming operation in such applications. Many algorithms and architectures are proposed in the literature to obtain efficient multiplication operation in both hardware and software. In this paper, a modified serial multiplication algorithm with interleaved modular reduction is proposed, which allows for an efficient realization of a sequential polynomial basis multiplier. The proposed sequential multiplier supports multiplication of any two arbitrary finite field elements over GF($2^m$) for generic irreducible polynomials, therefore made versatile. Estimation of area and time complexities of the proposed sequential multiplier is performed and comparison with existing sequential multipliers is presented. The proposed sequential multiplier achieves 50% reduction in area-delay product over the best of existing sequential multipliers for m = 163, indicating an efficient design in terms of both area and delay. The Application Specific Integrated Circuit (ASIC) and the Field Programmable Gate Array (FPGA) implementation results indicate a significantly less power-delay and area-delay products of the proposed sequential multiplier over existing multipliers.