• Journal of the Korea Institute of Information Security & Cryptology
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• v.21 no.5
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• pp.47-58
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• 2011

Recently, there are several technologies for protecting information in the lightweight device, One of them, the AES[1] algorithm and CRT mode, is used for numerous services(e,g, OMA DRM, VoIP, IPTV) as encryption technique for preserving confidentiality. Although it is possible that the AES algorithm CRT mode can parallel process transmitting data, IPTV Set-top Box or Mobile Device that uses these streaming service has limited computation-ability. So optimizing crypto algorithm and enhancing its efficiency for those environment have become an important issue. In this paper, we propose implementation method that can improve efficiency of the AES-CRT Mode by improving algorithm logics. Moreover, we prove the performance of our proposal on the mobile device which has limited capability.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.22 no.1
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• pp.100-108
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• 2018

This paper describes a design of scalable RSA public-key cryptography processor supporting four key lengths of 512/1,024/2,048/3,072 bits. The modular multiplier that is a core arithmetic block for RSA crypto-system was designed with 32-bit datapath, which is based on the CIOS (Coarsely Integrated Operand Scanning) Montgomery modular multiplication algorithm. The modular exponentiation was implemented by using L-R binary exponentiation algorithm. The scalable RSA crypto-processor was verified by FPGA implementation using Virtex-5 device, and it takes 456,051/3,496347/26,011,947/88,112,770 clock cycles for RSA computation for the key lengths of 512/1,024/2,048/3,072 bits. The RSA crypto-processor synthesized with a $0.18{\mu}m$ CMOS cell library occupies 10,672 gate equivalent (GE) and a memory bank of $6{\times}3,072$ bits. The estimated maximum clock frequency is 147 MHz, and the RSA decryption takes 3.1/23.8/177/599.4 msec for key lengths of 512/1,024/2,048/3,072 bits.

• The Journal of the Korea Contents Association
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• v.4 no.1
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• pp.55-66
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• 2004

Recently, as the personal computers are supplied rapidly, they formed the nucleus of the computer system. But, because of the easiness that anyone uses them to go near easily, it is the fact that the security of personal computer is weakness. So, in the paper, 1 propose the technical method that minimizes the loss and leakage of important data. This paper implemented a crypto system for security of data file on personal computer and assistance storage medium. The way of encryption/decryption is applied by complexity method which mixed Diffie-Hellman key exchange protocol, a typical RC4(Rivest Cipher version 4) algorithm of stream cipher and a typical MD5(Message Digest version 5) of Hash Function. For valuation implemented crypto system, three criteria is presented, which are crypto complexity, processing time and pattern matching. And according to analysis the three criteria the crypto system is verified the security, efficiency and usefulness. The crypto system is programmed with Visual C++ language of Microsoft. And so, as this is software system, we shall have a technical security system at a minimum cost for all personal computer.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.16 no.11
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• pp.2517-2524
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• 2012

This paper describes an efficient implementation of KS(Korea Standards) block cipher algorithm ARIA. The ARIA crypto-processor supports three master key lengths of 128/192/256-bit and four modes of operation including ECB, CBC, OFB and CTR. A hardware sharing technique, which shares round function in encryption/decryption with key initialization, is employed to reduce hardware complexity. It reduces about 20% of gate counts when compared with straightforward implementation. The ARIA crypto-processor is verified by FPGA implementation, and synthesized with a $0.13-{\mu}m$ CMOS cell library. It has 46,100 gates on an area of $684-{\mu}m{\times}684-{\mu}m$ and the estimated throughput is about 1.28 Gbps at 200 MHz@1.2V.

• The Journal of Information Technology
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• v.3 no.1
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• pp.61-72
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• 2000

In this paper, we propose a bit-sliced modular multiplication algorithm and a bit-sliced modular multiplier design meeting the increasing crypto-key size for RSA public key cryptosystem. The proposed bit-sliced modular multiplication algorithm was designed by modifying the Walter's algorithm. The bit-sliced modular multiplier is easy to expand to process large size operands, and can be immediately applied to RSA public key cryptosystem.

• Proceedings of the IEEK Conference
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• 2002.06b
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• pp.345-348
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• 2002

This paper presents new fast scalar multiplier of elliptic curve cryptosystem that is regarded as next generation public-key crypto processor. For fast operation of scalar multiplication a finite field multiplier is designed with LFSR type of bit serial structure and a finite field inversion operator uses extended binary euclidean algorithm for reducing one multiplying operation on point operation. Also the use of the window non-adjacent form (WNAF) method can reduce addition operation of each other different points.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2004.05b
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• pp.796-799
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• 2004

최근 반도체 기술과 회로 설계 기술이 발달하면서, 하드웨어와 소프트웨어 부분을 별도로 분리하여 설계하지 않고, 통합하여 설계함으로써 적은 비용으로 고성능의 시스템을 구축할 수 있는 통합설계 기반이 구축되었다. 그러나, 하드웨어와 소프트웨어가 혼재할 경우에는 두 영역 사이에서의 통신 부담이 비교적 큰 편으로 발생하여 오히려 소프트웨어로만 설계한 경우보다 성능이 떨어질 소지가 있다. 본 논문에서는 이러한 통신 부담을 줄일 수 있는 방안에 대해 세 가지를 간략히 소개하고 있다.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2022.10a
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• pp.349-350
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• 2022

As research on IT convergence continues, the scope of IoT (Internet of Things) services continues to expand. The IoT service uses a device suitable for the purpose. These IoT devices require an authentication function. In addition, in IoT services that handle important information such as personal information, security of transmission data is required. In this study, we implement a crypto key-based IoT network security system that can authenticate devices for IoT services and securely transmit data between devices. Through this study, IoT service can authenticate the device itself and maintain the confidentiality of transmitted data. However, since it is an IoT service, additional research on the application efficiency of the encryption algorithm is required.

• Journal of the Korea Institute of Military Science and Technology
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• v.14 no.2
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• pp.238-245
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• 2011

We suggest a DES key expansion algorithm which is strong enough to overcome Differential Cryptanalysis(DC) and Linear Cryptanalysis(LC). Checking the weak points of DES, we found that the opened S box provide all information on the various kinds of attack. Using the key expansion we redesigned the S box which is not open to anybody who has no key. DC and LC can not be applied to the suggested algorithm without the redesigned S box information. With the computer experiments we show that the efficiency of this algorithm is almost the same as that of DES with respect to the crypto speed.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• v.9 no.2
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• pp.852-855
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• 2005

This paper introduces a case study of designing a cryptographic processor dedicated to VPN/SSL system. The designed processor supports not only block cipher algorithm, including 3DES, AES, and SEED, but also 163 bit ECC public key crypto algorithm. Moreover, we adopted PCI Master interface in the design, which guarantees fast computation of cryptographic algorithm prevalent in general information security systems.