• Bulletin of the Korean Chemical Society
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• v.24 no.8
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• pp.1215-1218
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• 2003

An analysis of the bonding situation in CaM₂P₂ (M=Fe, Ni) with ThCr₂Si₂ structure is made in terms of DOS and COOP plots. The main contributions to covalent bonding are due to M-P and P-P interactions in both compounds. Particularly, the interlayer P-P bonding by variation in the transition metal is examined in more detail. It turns out that the shorter P-P bonds in CaNi₂P₂ form as a result of the decreasing electron delocalization into ${{\sigma}_p}^*$ of P₂ due to the weaker bonding interaction between the metal d and ${{\sigma}_p}^*$ as the metal d band is falling from Fe to Ni.

• Korean Journal of Materials Research
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• v.11 no.10
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• pp.813-819
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• 2001

The microstructure and the distribution of hardness of Co and A1 alloy powder cladding layer in high carbon 9CrSi alloy steel for roll materials cladded by laser surface cladding were investigated. And, for the evaluation of soundness as the roll materials, we examined the wear resistance of the cladding materials with the wear appratus of pin on disc type. The experimental results showed that the microstructure of laser cladding layer was constituted with the clad surface layer, the alloy layer, the heat treatment layer with base metal. The wear resistance of Ni alloy Powder cladding material was superior to that of Co alloy powder cladding material both at the low speed (0.46m/s) and the high speed(0.92m/s). It seemed that the behavior of wear showed the abrasive wear at the early stage and the adhesive wear at the late stage.

• Journal of the Korean institute of surface engineering
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• v.30 no.4
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• pp.248-254
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• 1997

The sulfidation behavior of a sputter-deposited amorphous coating of 69.0%Nb-16.9Ni-11.9%Al-2.2%Si (at.%) has been investigated as a funtion of temperature.(973-1173K) in pure sulfur pressure of 0.01atm. The sulfidation kinetics of the casting obyed the parabolic rate low over the whole temperature ranges studied. The stlfidation rate increased with the temperature, as expected. The sulfide scale, the composition of which was $Al_2S_3,\;NbS_2,\;Ni_{3-x}S_2\;and\;FeCrS_4$, formed on the amorphous coating was primarily bilayered. Both the outer fastgrowing non-protective 4Al_2S_3$scale and the inner slowly-growing protective $NbS_2$,/TEX> scale and the inner slowly-growing protective $NbS_2$ scale had some Fe and Cr dissolution, which evidently came from the base substrate alloy of stainless steel type 304. Belows the coating, Kirkendall void formation was noticed. Nevertheless, a dramatic improvement of sulfidation resistance was achieved by sputter-depositing Nb-2 Ni-Al-Si layer on the stainless steel 304.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.11 no.6
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• pp.1099-1103
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• 2007

TFT's have been intensively researched for possible electronic and display applications. Through tremendous engineering and scientific efforts, a-Si:H TFT fabrication process was greatly improved. In this paper, the reason on defects occurring at a-Si:H TFT fabrication process is analyzed and solved, so a-Si:H TFT's yield is increased and reliability is improved. The a-Si:H TFT of this paper is inverted staggered type TFT. The gate electrode is formed by patterning with length of $8{\mu}m{\sim}16{\mu}m$ and width of $80{\sim}200{\mu}m$ after depositing with gate electrode (Cr). We have fabricated a-SiN:H, conductor, etch-stopper and photo-resistor on gate electrode in sequence, respectively. We have deposited n+a-Si:H, NPR(Negative Photo Resister) layer after forming pattern of Cr gate electrode by etch-slower pattern. The NPR layer by inverting pattern of upper Sate electrode is patterned and the n+a-Si:H layer is etched by the NPR pattern. The NPR layer is removed. After Cr layer is deposited and patterned, the source-drain electrode is formed. The a-Si:H TFT made like this has problems at photo-lithography process caused by remains of PR. When sample is cleaned, this remains of PR makes thin chemical film on surface and damages device. Therefor, in order to improve this problem we added ashing process and cleaning process was enforced strictly. We can estimate that this method stabilizes fabrication process and makes to increase a-Si:H TFT's yield.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2002.05a
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• pp.192-196
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• 2002

This paper describes on the fabrication and characteristics of a metal thin-film pressure sensor based on Cr strain-gauges for harsh environment applications. The Cr thin-film strain-gauges are sputter-deposited onto a micromachined Si diaphragms with buried cavity for overpressure protectors. The proposed device takes advantages of the good mechanical properties of single-crystalline Si as diaphragms fabricated by SDB and electrochemical etch-stop technology, and in order to extend the operating temperature range, it incorporates relatively the high resistance, stability and gauge factor of Cr thin-films. The fabricated pressure sensor presents a low temperature coefficient of resistance, high-sensitivity, low non-linearity and excellent temperature stability. The sensitivity is 1.097~1.21 $mV/V{\cdot}kgf/cm^2$ in the temperature range of $25{\sim}200^{\circ}C$ and the maximum non-linearity is 0.43 %FS.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.24 no.11
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• pp.855-858
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• 2011

In this paper, in order to suppress unwanted current paths originating from adjacent cells in a passive crossbar array based on resistive random access memory (RRAM) without extrinsic switching devices, 1-diode type RRAM which consists of a 0.2% chromium-doped strontium titanate (Cr-$SrTiO_3$) film deposited on a silicon substrate, was proposed for high packing density, and intrinsic rectifying characteristics from the current versus voltage characteristics were successfully demonstrated.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.13 no.7
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• pp.1393-1398
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• 2009

Conventionally, etching is first considered for microelectronics fabrication process and is specially important in process of a-Si:H thin film transistor for LCD. In this paper, we stabilize properties of device by development of wet and dry etching process. The a-Si:H TFTs of this paper is inverted staggered type. The gate electrode is lower part. The gate electrode is formed by patterning with length of 8 ${\mu}$m${\sim}$16 ${\mu}$m and width of 80${\sim}$200 ${\mu}$m after depositing with gate electrode (Cr) 1500 ${\AA}$under coming 7059 glass substrate. We have fabricated a-SiN:H, conductor, etch-stopper and photo resistor on gate electrode in sequence, respectively. The thickness of these thin films is formed with a-SiN:H (2000 ${\mu}$m), a-Si:H(2000 ${\mu}$m) and n+a-Si:H (500 ${\mu}$m), We have deposited n-a-Si:H, NPR(Negative Photo Resister) layer after forming pattern of Cr gate electrode by etch-stopper pattern. The NPR layer by inverting pattern of upper gate electrode is patterned and the n+a-Si:H layer is etched by the NPR pattern. The NPR layer is removed. After Cr layer is deposited and patterned, the source-drain electrode is formed. In the fabricated TFT, the most frequent problems are over and under etching in etching process. We were able to improve properties of device by strict criterion on wet, dry etching and cleaning process.

• Journal of the Korean institute of surface engineering
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• v.34 no.2
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• pp.125-134
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• 2001

($Ti_{1-x}$ $Cr_{x}$ )N coatings were deposited by an ion-plating method in a reactor with two separate metal sources, Ti and Cr. Ti was evaporated using an electron beam, while Cr evaporation was carried out by resistant heating. The Ti and Cr concentrations in the coatings were controlled by the Ti and Cr evaporation ratio. The coating hardness increased with increasing the Cr content(x) and showed a maximum value of 6,000 HK at around x=0.8. The critical load of the coatings, measured by the scratch test, was around 30 N. The wear resistance properties of the ($Ti_{1-x}$$Cr_{ x}$)N coatings were evaluated using a CSEM pin-on-disk type tribometer. A Cr-steel ball as well as a SiC ball, which had hardness values of 590 HK and 2,600 HK respectively, were used as the pin. After the wear test, the surface morphology, roughness and the concentration of the coatings were investigated, with the main focus being on the effect of wear debris and the transferred layer on the wear behavior.

• Journal of the Mineralogical Society of Korea
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• v.21 no.1
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• pp.37-44
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• 2008

This study was performed to synthesize Na-A type zeolite with melting slag from the Mapo incineration site and recycle the zeolite as an environmental remediation agent. The melting slag used had a favorable composition containing 26.6% $SiO_2$, 10.9% $Al_2O_3$ and 2.7% $Na_2O$ for zeolite synthesis although there were high contents of iron oxides, including 19.6% $Fe_2O_3$ and 18.9% FeO, which had been used as a flux for the melting. It was confirmed that the Na-A type zeolite could be successfully synthesized at $80^{\circ}C$ and $SiO_2/Al_2O_3\;=\;0.80{\sim}1.96$. The cation exchange capacities (CEC) of the zeolites was determined to be about 220 cmol/kg leveled off at the synthetic time more than 10hrs. The adsorption capacities of zeolite to heavy metals (Cd, Cu, Mn and Pb) were high except for As arid Cr. It was also confirmed through the Eh and pH analysis that As and Cr existed in the forms of $HAsO_4^{2-}$ and $CrO_4^{2-}$. The low absorption rates of zeolite for As and Cr are attributed to the fact that the pore size ($4\;{\AA}$) of Na-A type is smaller than those of $HAsO_4^{2-}$ and $CrO_4^{2-}$ ions ($4\;{\AA}$ ionic radii and $8\;{\AA}$ diameter).

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2007.11a
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• pp.397-397
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• 2007

Diamondlike carbon (DLC) coatings were deposited on alumina ceramic seals using a plasma immersion ion deposition technique (PIID). Then they were subjected to tribological tests using a pin-on-disc tribometer under a high load (1.3 GPa) and under elevated temperatures up to 400C. Coefficients of friction (COFs) were recorded and compared with that of the untreated alumina while the wear tracks were analyzed using SEM with EDS to characterize the DLC films. To enhance the DLC adhesion to the substrate, various interlayers including Si and Cr were deposited using the PIID process or an ion beam assisted deposition (IBAD) method. It was observed that the DLC coating, if adhering well to the substrate, reduced the COFs significantly, from 0.4-0.8 for the uncoated alumina to about 0.05-0.1, within the tested temperature range. The adhesion was determined by the interlayer type and possibly by the application method. Cr interlayer did not perform as well as the Si interlayer. This could also be due to the fact that the Cr interlayer and the subsequent DLC coating had to be done in two different processing systems, while both the Si interlayer and the subsequent DLC film were deposited in one system without breaking the chamber. The coating failure mode was found to be delamination between the Cr and the alumina substrate. In contrast, the Si interlayer with proper DLC deposition procedures resulted in very good adhesion and hence excellent tribological performance. Further study may lead to future DLC applications of ceramic seals.