• Journal of the Korean Institute of Telematics and Electronics
• /
• v.27 no.7
• /
• pp.1015-1024
• /
• 1990

This paper proposes a program counter unit(PCU) on the pipelined architecture of RISC (Reduced Instruction Set Computer) type high performance processors, PCU is used for supplying instruction addresses to memory units(Instruction Cache) efficiently. A RISC processor's PCU has to compute the instruction address within required intervals continnously. So, using the method of self-generated incrementor, is more efficient than the conventional one's using ALU or private adder. The proposed PCU is designed to have the fast +4(Byte Address) operation incrementor that has no carry propagation delay. Design specifications are taken by analyzing the whole data path operation of target processor's default and exceptional mode instructions. CMOS and wired logic circuit technologic are used in PCU for the fast operation which has small layout area and power dissipation. The schematic capture and logic, timing simulation of proposed PCU are performed on Apollo W/S using Mentor Graphics CAD tooks.

• The Transactions of The Korean Institute of Electrical Engineers
• /
• v.60 no.2
• /
• pp.320-324
• /
• 2011

A digital technique is adopted to calibrate the current mismatch of the charge pump (CP) in phase-locked loops. A 2 GHz charge pump PLL (CPPLL) is used to justify the proposed calibration technique. The proposed digital calibration technique is implemented simply using a counter. The proposed calibration technique reduces the calibration time by up to a maximum of 50% compared other with techniques. Also by using a dual-mode CP, good current matching characteristics can be achieved to compensate $0.5{\mu}A$ current mismatch in CP. It was designed in a standard $0.13{\mu}m$ CMOS technology. The maximum calibration time is $33.6{\mu}s$ and the average power is 18.38mW with 1.5V power supply and effective area is $0.1804mm^2$.

• Journal of the Institute of Electronics and Information Engineers
• /
• v.53 no.10
• /
• pp.40-47
• /
• 2016

In this paper, a dual mode buck converter with an ability to change mode is proposed, which is suitable particularly for portable device. The problem of conventional mode control circuit is affected by load variation condition such as suddenly or slowly. To resolve this problem, the mode control was designed with slow clock method. Also, when change from the PFM(Pulse Frequency Modulation) mode to the PWM(Pulse Width Modulation) mode, to use the counter to detect a high load. And the user can select mode transition point in load range from 20mA to 90mA by 3 bit digital signal. The circuits are implemented by using BCDMOS 0.18um 2-polt 3-metal process. Measurement environment are input voltage 3.7V, output voltage 1.2V and load current range from 10uA to 500mA. And measurement result show that the peak efficiency is 86% and ripple voltage is less 32mV.

• Journal of Sensor Science and Technology
• /
• v.32 no.6
• /
• pp.432-440
• /
• 2023

This study introduces an efficient readout circuit designed for two-electrode electrocardiogram (ECG) recording, characterized by its low-noise and low-power consumption attributes. Unlike its three-electrode counterpart, the two-electrode ECG is susceptible to common-mode interference (CMI), causing signal distortion. To counter this, the proposed circuit integrates a common-mode charge pump (CMCP) with a window comparator, allowing for a CMI tolerance of up to 20 V_PP. The CMCP design prevents the activation of electrostatic discharge (ESD) diodes and becomes operational only when CMI surpasses the predetermined range set by the window comparator. This ensures power efficiency and minimizes intermodulation distortion (IMD) arising from switching noise. To maintain ECG signal accuracy, the circuit employs a chopper-stabilized instrumentation amplifier (IA) for low-noise attributes, and to achieve high input impedance, it incorporates a floating high-pass filter (HPF) and a current-feedback instrumentation amplifier (CFIA). This comprehensive design integrates various components, including a QRS peak detector and serial peripheral interface (SPI), into a single 0.18-㎛ CMOS chip occupying 0.54 mm². Experimental evaluations showed a 0.59 µV_RMS noise level within a 1-100 Hz bandwidth and a power draw of 23.83 µW at 1.8 V.

• Proceedings of the Korean Institute of IIIuminating and Electrical Installation Engineers Conference
• /
• 2004.05a
• /
• pp.81-85
• /
• 2004

This paper describes the testing facility to demonstrate the performance of the distribution class circuit breakers and switchgears and the testing methods. The field-test evaluation system consists of two parts. One is the distribution system for simulation of the condition on interruption mode of switches which are installed in the system and tested by the AFG(Artificial Fault Generator) and the thunderbolt generator just like in the real field. The other is a laboratory for confirmation or the important characteristics regarding to the insulation, gas, environment durability of equipment. For the fatal failure mode, a FMEA(Failure Modes and Effects Analysis) technique which is a kind of a structural analysis to consider a counter-plan was emploved.

• Journal of information and communication convergence engineering
• /
• v.2 no.3
• /
• pp.182-186
• /
• 2004

When most of existing instant messengers log on server, they transmit to sever in encoding password to RC5. but RC5 don't be secured because it has been known many of password cracking tools. Also, messengers don't have any protection on the transmitted information with communicating two hosts since loging on, endangering the privacy of the user. As a counter measure, messengers need to provide security service including message encryption. In this paper, we designed a key exchange method of password representing fast, effective and high security degree, using ECC(Elliptic Curve Cryptography) that being known the very stronger than another public key cryptography with same key size. To effectively improve data transmission and its security using IPSec protocol between users, tunnel mode is introduced. Tunnel mode transmits Host-to-Host data through virtual pipelines on the Internet.

• Smart Structures and Systems
• /
• v.19 no.1
• /
• pp.91-103
• /
• 2017

Generalized fractal dimension is used to detect the presence of partial delamination in a composite laminated beam. The effect of boundary conditions and location of delamination on the fractal dimension curve is studied. Appropriability of higher mode shape data for detection of delamination in the beam is evaluated. It is shown that fractal dimension measure can be used to detect the presence of partial delamination in composite beams. It is found that the torsional mode shape is well suited for delamination detection in beams. First natural frequency of delaminated beam is found to be higher than the healthy beam for certain small and partial width delaminations and some boundary conditions. An explanation towards this counter intuitive phenomenon is provided.

• Korean Journal of Optics and Photonics
• /
• v.15 no.2
• /
• pp.89-99
• /
• 2004

At the interface of two materials with frequency-dependent material-parameters of permittivity and permeability, there may exist two kinds of surface polaritons: surface electric-polaritons(SEPs) and surface magnetic-polaritons(SMPs). Possible combinations of the material-parameters to support propagation of the two surface polaritons are suggested at the interface between metals and metamaterials such as a left-handed material. Dispersion relations are also derived in order to characterize frequency dependence of propagation of the SEP and SMP. It is found that only one propagation mode of SEP or SMP is allowed at a given set of four material parameters, and that counter-propagation of the phase and group velocities of the propagation mode can be observed even in the case when there are no double negative(or, negative-index) materials. Physical origin of the counter-propagation of the group velocity is proposed by evaluating the ratio of two electromagnetic-energy densities of a surface polariton propagating along within the two interface media, and it is confirmed by the dispersion relations.

• The Journal of Korean Institute of Communications and Information Sciences
• /
• v.34 no.8A
• /
• pp.640-647
• /
• 2009

IEEE 802.11i is an amendment to the original IEEE 802.11/b,a,g standard specifying security mechanism by stipulating RSNA for tighter security. The RSNA uses TKIP(Temporal Key Integrity Protocol) and CCMP(Counter with CBC-MAC Protocol) instead of old-fashioned WEP(Wired Equivalent Privacy) for data encryption. This paper describes a design of a communication security engine for IEEE 802.11i MAC layer. The design includes WEP and TKIP modules based on the RC4 encryption algorithm, and CCMP module based on the AES encryption algorism. The WEP module suffices for compatibility with the IEEE 802.11 b,a,g MAC layer. The CCMP module has about 816.7Mbps throughput at 134MHz, hence it satisfies maximum 600Mbps data rate described in the IEEE 802.11n specifications. We propose a pipelined AES-CCMP cipher core architecture, which has lower hardware cost than existing AES cores, because CBC mode and CTR mode operate at the same time.

• Journal of the Korea Institute of Information and Communication Engineering
• /
• v.9 no.4
• /
• pp.798-803
• /
• 2005

This paper describes a design of AES(Advanced Encryption Standard)-based CCMP core for IEEE 802.1li wireless LAN security. To maximize its performance, two AES cores ate used, one is for counter mode for data confidentiality and the other is for CBC(Cipher Block Chaining) mode for authentication and data integrity. The S-box that requires the largest hardware in AES core is implemented using composite field arithmetic, and the gate count is reduced by about $20\%$ compared with conventional LUT(Lookup Table)-based design. The CCMP core designed in Verilog-HDL has 13,360 gates, and the estimated throughput is about 168 Mbps at 54-MHz clock frequency. The functionality of the CCMP core is verified by Excalibur SoC implementation.