• Journal of Information Processing Systems
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• v.11 no.2
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• pp.266-279
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• 2015

In this paper, we propose a novel block cipher mode of operation, which is known as the counter chain (CC) mode. The proposed CC mode integrates the cipher block chaining (CBC) block cipher mode of operation with the counter (CTR) mode in a consistent fashion. In the CC mode, the confidentiality and authenticity of data are assured by the CBC mode, while speed is achieved through the CTR mode. The proposed mode of operation overcomes the parallelization deficiency of the CBC mode and the chaining dependency of the counter mode. Experimental results indicate that the proposed CC mode achieves the encryption speed of the CTR mode, which is exceptionally faster than the encryption speed of the CBC mode. Moreover, our proposed CC mode provides better security over the CBC mode. In summary, the proposed CC block cipher mode of operation takes the advantages of both the Counter mode and the CBC mode, while avoiding their shortcomings.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.25 no.4
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• pp.588-594
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• 2021

SIMON, a lightweight block cipher developed by the US National Security Agency, is a family of block ciphers optimized for hardware implementation. It supports many kinds of standards to operate in various environments. The counter mode of operation is one of the operational modes. It provides to encrypt plaintext which is longer than the original size. The counter mode uses a constant(Nonce) and Counter value as an input value. Since Nonce is the identical for all blocks, so it always has same result when operates with other constant values. With this feature, it is possible to skip some instructions of round function by pre-computation. In general, the input value of SIMON is affected by the counter. However in an 8-bit environment, it is calculated in 8-bit units, so there is a part that can be pre-computed. In this paper, we focus the part that can be pre-calculated, and compare with previous works.

• Journal of Sensor Science and Technology
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• v.21 no.1
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• pp.1-6
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• 2012

Using a current-mode multiple reset, a current-to-voltage(I-V) converter with a wide dynamic range was produced. The converter consists of a trans-impedance amplifier(TIA), an analog-to-digital converter(ADC), and an N-bit counter. The digital output of the I-V converter is composed of higher N bits and lower bits, obtained from the N-bit counter and the ADC, respectively. For an input current that has departed from the linear region of the TIA, the counter increases its digital output, this determines a reset current which is subtracted from the input current of the I-V converter. This current-mode reset is repeated until the input current of the TIA lies in the linear region. This I-V converter is realized using 0.35 ${\mu}m$ LSI technology. It is shown that the proposed I-V converter can increase the maximum input current by a factor of $2^N$ and widen the dynamic range by $6^N$. Additionally, the I-V converter is successfully applied to a photometric sensor.

• Journal of information and communication convergence engineering
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• v.15 no.4
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• pp.212-216
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• 2017

In this paper, we introduce novel techniques to improve the high performance of AE functions on modern high-end IoT platforms (ARM-NEON), which support SIMD and cryptography instruction sets. For the Sophie Germain Counter Mode of operation (SGCM), counter modes of encryption and prime field multiplication are required. We chose the Montgomery multiplication for modular multiplication. We perform Montgomery multiplication in a parallel way by exploiting both the ARM and NEON instruction sets. Specifically, the NEON instruction performed 128-bit integer multiplication and the ARM instruction performed Montgomery reduction, simultaneously. This approach hides the latency for ARM in the NEON instruction set. For a high-speed counter mode of encryptions for both AE functions, we introduced two-level computations. When the tasks were large volume, we switched to the NEON instruction to execute the encryption operations. Otherwise, we performed the encryptions on the ARM module.

• Nuclear Engineering and Technology
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• v.56 no.9
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• pp.3553-3557
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• 2024

This manuscript describes a neutron counting system based on cylindrical fission counters that can monitor neutron activity for high-energy neutron flux above 10 MeV under electrically noisy environments with intense gamma rays. Miniature fission counters with depleted uranium as sensitive material and modular electronics were built for digital signal processing and high-countrate operation. The counters are 9.5 mm in diameter and 71.1 mm in active length. The author presents the results of Monte Carlo simulations of the fission-counter response for selected neutron sources and energies based on ENDF7.1, JENDL-5, and TENDL-2021 nuclear data libraries from 1 meV to 200 MeV. For a white neutron beam (Ē = 16.36 MeV) that irradiates the front face of a counter, the intrinsic efficiency is evaluated to be (2.24 ± 0.02) × 10^-5 counts/n, while the efficiency of the counter in the array appears to increase by at most 6.7%.

• Transactions of the Korean Society of Automotive Engineers
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• v.16 no.1
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• pp.114-120
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• 2008

Recently, the nano-PM's number concentration emitted by diesel internal combustion engine has focused on attention because this particulate matters are suspected being hazardous of human health. In this study, The nano-PM mass and size of diesel passenger vehicles were measured on chassis dynamometer test bench. The particulate matters(PM) emissions of these vehicles were investigated by number concentration too. A condensation particle counter(CPC) system was applied to measure the particle number and size concentration of diesel exhaust particles at the end of dilution tunnel along the NEDC(ECE15+EUDC) and CVS-75 vehicle test mode. As the research result, the characteristic of vehicle test mode on the diesel nano-particle number and size distribution was investigated in this study.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.31 no.6A
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• pp.640-647
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• 2006

This paper describes a design of AES-based CCMP(Counter mode with CBC-MAC Protocol) core for IEEE 802.11i wireless LAN security. To maximize the performance of CCMP core, two AES cores are used, one is the counter mode for data confidentiality and the other is the CBC node for authentication and data integrity. The S-box that requires the largest hardware in ARS core is implemented using composite field arithmetic, and the gate count is reduced by about 27% compared with conventional LUT(Lookup Table)-based design. The CCMP core was verified using Excalibur SoC kit, and a MPW chip is fabricated using a 0.35-um CMOS standard cell technology. The test results show that all the function of the fabricated chip works correctly. The CCMP processor has 17,000 gates, and the estimated throughput is about 353-Mbps at 116-MHz@3.3V, satisfying 54-Mbps data rate of the IEEE 802.11a and 802.11g specifications.

• 한국정보디스플레이학회:학술대회논문집
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• 2004.08a
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• pp.209-212
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• 2004

A navel fast-switching LCD with dual-domain bend (DDB) mode is described DDB alignment is achieved using antiparallel-rubbed cell filled with chiral-doped LC. Initial alignment is mono-domain 180-degree twist. Tilt direction is controlled by oblique electric field to be counter direction in each domain Twist-to-DDB deformation occurs continuously so that DDB mode does not require high-voltage initialization which is inevitable in Optically Compensated Bend (OCB) mode. DDB gives wide and symmetric viewing angle in contrast to mono-domain bend formed from 180-degree twist showing strong asymmetry.

• KSBB Journal
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• v.15 no.4
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• pp.346-351
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• 2000

Several solvents or combinations of solvents were tested for the extraction of wet or dried biomass at different extraction mode from plant cell cultures. Methanol gave the highest paclitaxel recovery with the least amount of solvent usage. before extraction drying of biomass wass helpful to decrease solvent usage in extraction step./ in this case drying method was very important to obtain high yield from dried biomass. In thid mode of operation counter-current extraction process can be able to decrease solvent usage but paclitaxel recovery was almost same with both batch and counter-current mode of operation. The number of extraction times was at least four to obtain high yield(>99%) from cell and one to obtain highyield(>96%) from cell debris in batch mode. Equilibrium (i.e. the ratio of paclitaxel in biomass to paclitaxel in the extraction solvent) was reached within 5 minutes. The minimum methodal concentration (90%) and solvent amount(biomass : solvent=1 Kg : 1L) are enough to obtain high yield(>98%) for extraction from biomass.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2008.10a
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• pp.243-246
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• 2008

This thesis suggests block cipher operating mode using ASR(Arithmetic Shift Register). ASR is ratted arithmetic shift register which is sequence that is not 0 but initial value $A_0$ multiplies not 0 or 1 but free number D on $GF(2^n)$. This thesis proposes ASR mode which changes output multiplying d and Floating ASR mode which has same function but having strengthened stability altering d. If we use ASR's output as a counter, there's advantage that it has higher stability and better speed than CTR. Also, ASR mode and FASR mode have advantage of Random access which is not being functioned on CTR mode, they can be widely used to any part which Random access is needed.