• 전자공학회논문지B
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• 제33B권9호
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• pp.37-48
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• 1996

In this paper, for the single s-a-E fault detected in a triangular cellular permutation network (TCPN), we propose a method which can tolerate a fault by reconfiguring the netowrk and analyze the possibilities of the reconfiguration. The network is set up through iterative decomposition of a permutation into the right or left coset. For the s-a-E fault of a cell which is to be transpositioned for an increasing order mapping, we cna reconfigure it merely by switching te decomposition scheme from right coset to left coset or vice versa. Also for a decreasing order mapping, we make a detour around the faulty cell. Reconfiguring with the redundant connectivity of a TCPN, we could realize form 17% to 90% of the permutation for the number of inputs from 4 to 40. REconfiguration of the network by exchanging the first input with the last input and the first output with the last output resulted in more than 99% realization of the permutation. Also with the exchange of all inputs and outputs with neighboring cells, we could have 100% realization of the permutation.

• 한국통신학회논문지
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• 제32권4C호
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• pp.379-388
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• 2007

In this paper, we propose an adaptive turbo decoding algorithm for high order modulation scheme combined with originally design for a standard rate-1/2 turbo decoder for B/QPSK modulation. A transformation applied to the incoming I-channel and Q-channel symbols allows the use of an off-the-shelf B/QPSK turbo decoder without any modifications. Adaptive turbo decoder process the received symbols recursively to improve the performance. As the number of iterations increase, the execution time and power consumption also increase as well. The source of the latency and power consumption reduction is from the combination of the radix-4, dual-path processing, parallel decoding, and early-stop algorithms. We implemented the proposed scheme on a field-programmable gate array (FPGA) and compared its decoding speed with that of a conventional decoder. From the result of implementation, we confirm that the decoding speed of proposed adaptive decoding is faster than conventional scheme by 6.4 times.

• ETRI Journal
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• 제29권3호
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• pp.363-370
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• 2007

In this paper, we propose a flexible turbo decoding algorithm for a high order modulation scheme that uses a standard half-rate turbo decoder designed for binary quadrature phase-shift keying (B/QPSK) modulation. A transformation applied to the incoming I-channel and Q-channel symbols allows the use of an off-the-shelf B/QPSK turbo decoder without any modifications. Iterative codes such as turbo codes process the received symbols recursively to improve performance. As the number of iterations increases, the execution time and power consumption also increase. The proposed algorithm reduces the latency and power consumption by combination of the radix-4, dual-path processing, parallel decoding, and early-stop algorithms. We implement the proposed scheme on a field-programmable gate array and compare its decoding speed with that of a conventional decoder. The results show that the proposed flexible decoding algorithm is 6.4 times faster than the conventional scheme.