• 조명전기설비학회논문지
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• 제28권5호
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• pp.52-59
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• 2014

This paper presents an improved operating characteristics of squirrel-cage induction motor(IM) for 5-phase 1.5kW, 220V, 60Hz in order to study a polyphase AC machinery that keep hold of advantages more than traditional three-phase a IM, such as reducing a amplitude of torque pulsation, decreasing electric noises, and increasing the reliability. The developed manufacturing motor was necessary to do improvement of speed regulation, efficiency, operating characteristics, and so on at rated load. There are remake a redesigned and distributed stator winding connection without changing the frames of stator and rotor core in previous established the motor by a repeat tests. There are shown a experiments results of no-load test, locked rotor test, operating characteristics at variable load, FFT analysis of harmonics within output voltages and current waveform, decided motor parameters.

• 조명전기설비학회논문지
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• 제27권9호
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• pp.53-61
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• 2013

This paper propose a improved operating characteristics of the 5-phase 5kW within developed the surface permanent mount synchronous generator (SPMSG) in order to make a study of a polyphase ac motors keeping hold of more advantages. The developed manufacturing motor was necessary to do improvement of voltage regulation, efficiency, operating characteristics, and so on at the rated load. There are remake a redesigned and distributed stator winding connection without changing the frames of stator and rotor core in previous established generator by a repeat tests. There are shown a amplitude and waveform of the generated electromotive force, FFT analysis of harmonics within output voltages, and reviewing a experiment results in load of resistive and 5-phase induction motor by variable generator output frequency.

• 전력전자학회논문지
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• 제12권1호
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• pp.50-55
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• 2007

본 논문에서는 Two transistor forward(TTF) DC-DC 컨버터의 회로방식에 대한 전력변환 효율특성을 빠르고 효과적인 분석 방법에 대해 보고한 것이다. TTF 컨버터의 회로 구성 소자 중에서 내부 기생저항만을 고려한 등가회로를 유도하고 이상적인 동작 파형을 이용하여 전류의 실효값과 전도손실을 유도하였다. 해석을 간단하게 하기위해서 정상상태 결과로부터 코어 손실은 무시하였으며, 다이오드의 손실과 전도손실 만을 고려하였다. 해석결과의 타당성을 검토하기 위해서 시험용 TTF 컨버터를 구성하여 검증하였다. 입력전압 390V, 출력전압 12V, 최대전력 480W의 조건에서 실험결과와 해석결과와 비교적 잘 일치한다는 것을 본 논문에서 확인 하였다.

• Transactions on Electrical and Electronic Materials
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• 제11권1호
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• pp.20-23
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• 2010

The analog front end (AFE) of a radio frequency identification transponder using the ISO 14443 type A standard with a 100% amplitude shift keying (ASK) modulation is proposed in this paper and verified by circuit simulations and measurements. This AFE circuit, using a 13.56 MHz carrier frequency, consists of a rectifier, a modulator, a demodulator, a regulator, a power on reset, and a dynamically enabled digital phase locked loop (DPLL). The DPLL, with a charge pump enable circuit, was used to recover the clock of a 100% modulated ASK signal during the pause period. A high voltage lateral double diffused metal-oxide semiconductor transistor was used to protect the rectifier and the clock recovery circuit from high voltages. The proposed AFE was fabricated using the $0.18\;{\mu}m$ standard CMOS process, with an AFE core size of $350\;{\mu}m\;{\times}\;230\;{\mu}m$. The measurement results show that the DPLL, using a demodulator output signal, generates a constant 1.695 MHz clock during the pause period of the 100% ASK signal.

• 한국정보통신학회논문지
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• 제14권8호
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• pp.1868-1876
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• 2010

본 논문에서는 logic 공정 기반의 소자만 사용한 256bit EEPROM IP를 설계하였다. 소자간의 전압을 신뢰성이 보장되는 5.5V 이내로 제한하기위해 EEPROM의 코어 회로인 CG (Control Gate)와 TG (Tunnel Gate) 구동 회로를 제안하였다. 그리고 DC-DC converter인 VPP (=+4.75V), VNN (-4.75V)과 VNNL (=VNN/3) generation 회로를 제안하였고 CG와 TG 구동 회로에 사용되는 switching power인 CG_HV, CG_LV, TG_HV, TG_LV, VNNL_CG와 VNNL_TG 스위칭 회로를 설계하였다. 일반적인 모의실험 조건에서 read, program, erase 모드의 전력 소모는 각각 $12.86{\mu}W$, $22.52{\mu}W$, $22.58{\mu}W$으로 저전력 소모를 갖는다. 그리고 테스트 칩을 측정한 결과 256bit이 정상적으로 동작을 하였으며, VPP, VNN, VNNL은 4.69V, -4.74V, -1.89V로 목표 전압 레벨이 나왔다.

• 한국전기전자재료학회논문지
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• 제27권11호
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• pp.690-695
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• 2014

In this paper, we develop a explosion-proof LED lighting (Ex circuit) circuit of Explosion-proof LED Signal Lamp (Ex LSL) to utilize the core module of the explosion-proof Local Control System (Ex LCS) for offshore plant applications. And then analyzed its electrical, optical and thermal characteristics. Ex circuit was applied input voltage from AC/DC(12~254) V. In this experiments, stable light-on characteristics were confirmed by eyes for the every input voltages with min. 78,462 and max. $517,975cd/m^2$ of luminance. also Output current and output luminance was made proportional. Because the measured maximum surface temperature of Ex circuit was $54.23^{\circ}C$ at AC 48 V, Ex circuit was rated with T6 of temperature class. Finally, Ex circuit was shown stable light on characteristics under the $-50^{\circ}C$ and $60^{\circ}C$ during 12 hours of test period.

• 조명전기설비학회논문지
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• 제22권1호
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• pp.113-117
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• 2008

본 논문에서는 결선방향에 따른 자속구속형 전류제한기의 전류제한 및 회 특성에 대해 분석하였다. 자속구속형 초전도 한류기는 초전도 소자와 직렬로 연결된 2차 권선과 병렬로 연결된 1 2차 권선으로 구성되어 있다. 1 2차 권선의 결선방향에 따른 가극 결선과 가극 결선을 갖는 자속구속형 전류제한기를 저항형 전류제한기와 비교하여 분석하였다. 전류제한 및 회복특성은 1 2차 권선의 결선방향에 의존한다. 가극 결선을 갖는 자속구속형 전류제한기의 퀜치시간은 감극 결선이나 저항형 전류제한기보다 더 빠르다는 것을 확인하였다. 초전도 소자에서 소비되는 에너지는 $W= VIt=I^2Rt$으로 표현할 수 있다. 결선 방향에 따라 초전도 소자에서 소비되는 에너지의 차이는 초전도 소자에서 부담하는 전압의 차이 때문이라는 것을 확인할 수 있었다.

• 전력전자학회논문지
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• 제14권3호
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• pp.228-234
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• 2009

본 논문에서는 위상제어방식 풀브릿지 컨버터의 회로방식에 대한 전력손실과 전력변환 효율특성을 빠르고 효과적인 분석 방법에 대해 보고한 것이다. 위상제어방식 풀브릿지 컨버터의 회로 구성 소자 중에서 내부 기생저항만을 고려한 등가회로를 유도하고 이상적인 동작 파형을 이용하여 전류의 실효값과 전도손실을 유도하였다. 해석을 간단하게 하기 위해서 정상상태 결과로부터 코어 손실은 무시하였으며, 동기정류기 손실과 전도손실 만을 고려하였다. 해석결과의 타당성을 검토하기 위해서 시험용 위상제어방식 풀브릿지 컨버터를 구성하여 검증하였다. 입력전압 400V, 출력전압 12V, 최대전력 720W의 조건에서 실험결과와 해석결과와 비교적 잘 일치한다는 것을 본 논문에서 확인 하였다.

• 한국정보디스플레이학회:학술대회논문집
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• 한국정보디스플레이학회 2007년도 7th International Meeting on Information Display 제7권1호
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• pp.1005-1008
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• 2007

In this study, an architecture for 262K-color TFT-LCD source driver. In this paper proposed the chip consumes smaller area and static current which is suitable for QVGA resolutions. In the conventional structures, all of them need large number of OPAMP buffers to drive the pixels, Therefore, highly resistive R-DACs are needed to generate gamma voltages to reduce the static current. In this study, our design only used two OPAMPs and low resistance RDACs without increasing the quiescent current. Thus, it was experted that chip would be more in consuming lower static power for longer battery lifetime. The source driver were implemented by the 3.3 V $0.35\;{\mu}m$ CMOS technology provided by TSMC. The area of the core OPAMP circuit was about $110\;{\mu}m\;{\times}\;150\;{\mu}m$ and that of the source driver was $880\;{\mu}m\;{\times}\;430\;{\mu}m$. As compared to the conventional structure, approximately 64.48 % in area was achieved.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2003년도 하계학술대회 논문집 B
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• pp.723-725
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• 2003

The result of design and Partial fabrication of a 1 MVA single phase high temperature superconducting(HTS) transformer for power distributions are presented in this paper. The HTS windings are wound as double pancake windings which have advantages of uniform distribution of high voltage over the windings. the rated primary and secondary voltages are 22.9 kV and 6.6 kV respectively. Four HTS tapes are wound in parallel for secondary windings considering the rated currents of the transformer. The HTS windings will be cooled down to 65 K by natural convection of sub-cooled liquid nitrogen using a single-staged GM-cryocooler in order to make the stability of the HTS windings better. The iron core is designed as shell type and isolated from the liquid nitrogen by an FRP cryostat which have a room temperature bore. After the complete fabrication of the total HTS transformer system, performance test of the transformer will be carried out.