• Nuclear Engineering and Technology
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• v.45 no.6
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• pp.721-730
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• 2013

Within the framework of the ASTRID project, core design studies are being conducted by the CEA with support from AREVA and EDF. The pre-conceptual design studies are being conducted in accordance with the GEN IV reactor objectives, particularly in terms of improving safety. This involves limiting the consequences of 1) a hypothetical control rod withdrawal accident (by minimizing the core reactivity loss during the irradiation cycle), and 2) an hypothetical loss-of-flow accident (by reducing the sodium void worth). Two types of cores are being studied for the ASTRID project. The first is based on a 'large pin/small spacing wire' concept derived from the SFR V2b, while the other is based on an innovative CFV design. A distinctive feature of the CFV core is its negative sodium void worth. In 2011, the evaluation of a preliminary version (v1) of this CFV core for ASTRID underlined its potential capacity to improve the prevention of severe accidents. An improved version of the ASTRID CFV core (v2) was proposed in 2012 to comply with all the control rod withdrawal criteria, while increasing safety margins for all unprotected-loss-of-flow (ULOF) transients and improving the general design. This paper describes the CFV v2 design options and reports on the progress of the studies at the end of pre-conceptual design phase 1 concerning: - Core performance, - Intrinsic behavior during unprotected transients, - Simulation of severe accident scenarios, - Qualification requirements. The paper also specifies the open options for the materials, sub-assemblies, absorbers, and core monitoring that will continue to be studied during the conceptual design phase.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2013.10a
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• pp.809-812
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• 2013

This paper realize power control embedded system with one master of Core-A 32-bit RISC processor and several slaves controling power with synchronized digital signals. Core-A platform provided by Dynalith Systems consists of Core-A processor, AMBA bus, SSRAM, AC97, DMA, UART, GPIO etc. Slave is made by both digital part and analog part. The former generates various power control patterns synchronized with master signal. The latter converts 220V power proportional to 4 bit digital signals. Design of Embedded system is executed in Flowrian2 of System Centroid Inc., in which software is cross-compiled and hardware is verified by simulation. Embedded system is implemented in FPGA board and CPLD chips as well as PCB board for analog power control.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.18 no.6
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• pp.1413-1421
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• 2014

This paper realize power control embedded system with one master of Core-A 32-bit RISC processor and several slaves controling power with synchronized digital signals. Core-A platform is consisted of Core-A processor, AMBA bus, SSRAM, AC97, DMA, UART, GPIO etc. Slave is made by both digital part and analog part. The former generates various power control patterns synchronized with master signal. The latter converts 220V power proportional to 4 bit digital signals. design of Embedded system is executed in Flowrian II, in which software is cross-compiled and hardware is verified by simulation. Embedded system is implemented in FPGA board and CPLD chips as well as PCB board for analog power control.

• Proceedings of the Korean Magnestics Society Conference
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• 1997.05a
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• pp.90-91
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• 1997

• Proceedings of the Korean Nuclear Society Conference
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• 2001.05a
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• pp.67.2-67
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• 2001

• 제어로봇시스템학회:학술대회논문집
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• 2002.10a
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• pp.53.5-53
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• 2002

1. Introduction 2. PCI Local Bus Specification Abstract 3. Design Embedded PCI Local Bus 4. Simulation Results 5. DAS Application Design Methodology 6. Conclusion

• Proceedings of the Korean Nuclear Society Conference
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• 2001.10a
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• pp.73-73
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• 2001

• Proceedings of the Korean Nuclear Society Conference
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• 2002.05a
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• pp.157-157
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• 2002

• Proceedings of the Korean Radioactive Waste Society Conference
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• 2004.06a
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• pp.43-51
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• 2004

In order to decommission the shielding concrete of KRR(Korea Research Reactor) -1＆2, it must be exactly determined activated level and range by neutron irradiation during operation. To determine the activated level and range, it must be sampled and analyzed the core sample. But, there are difficulties in sample preparation and determination of the measurement efficiency by self-absorption. In the study, the full energy efficiency of the HPGe detector was compared with the measured value using standard source and the calculated one using Monte Carlo simulation. Also. self-absorption effects due to the density and component change of the concrete were calculated using the Monte Carlo method. Its results will be used radioactivity analysis of the real concrete core sample in the future.

• Journal of Korea Game Society
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• v.13 no.2
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• pp.111-118
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• 2013

The US military is developing and improving SE-CORE and CVE to integrate war game between different kinds of systems, establish time-optimal CVE. Although South Korea is researching SEDRIS, etc. that is suitable for domestic circumstances, there are still many problems to be solved. The researchers suggest a way to semi-automate part of SNE process, by using the channel information of the image. This can help to improve speed of creating synthetic environment and facilitate information sharing to the others. If there is further research on the subject, it will be possible to develop automation technology to apply data from various information collection devices to synthetic battlefield environment (SBE).