• Journal of the Korea Society for Simulation
• /
• v.9 no.4
• /
• pp.11-23
• /
• 2000

The purpose of format conversion is to convert a wide range of personal computer video formats into a target format. Circuits for the conversion have been developed by means of interpolation techniques, such as zero-order interpolation, bilinear interpolation, and bisigmoidal interpolation. This paper proposes a scan converter using cubic splines. The converter was modeled in VHDL, simulated on Max+plus Ⅱ , and implemented with an FPGA chip. The circuit gives much better conversion performance than a scan converter with zero-order or linear interpolation techniques according to simulation results and implementation.

• Proceedings of the Korea Society for Simulation Conference
• /
• 2000.04a
• /
• pp.91-95
• /
• 2000

The purpose of format conversion is to convert a wide range of personal computer video formats to a target format. Circuits for the conversion has been developed by means of interpolation techniques, such as zero-order interpolation, bilinear interpolation, and bisigmoidal interpolation. This paper proposes a scan converter using cubic splines. The converter was modeled in VHDL on Max+Plus II and implemented with an FPGA cpip. The circuit gives much better conversion performance than a scan converter with zero-order or linear interpolation.

• Journal of Power Electronics
• /
• v.19 no.3
• /
• pp.676-690
• /
• 2019

This paper presents a switched capacitor (SC) based bidirectional dc-dc converter topology for high voltage gain applications. The proposed converter is able to operate with multiple integral voltage conversion ratios based on user input. The architecture of a user-friendly, inductor-less multi-voltage-gain bidirectional dc-dc converter is proposed in this study. The inductor-less or magnetic-less design of the proposed converter makes it effective in higher temperature applications. Furthermore, the proposed converter has a reduced component count and lower voltage stress across its switches and capacitors when compared to existing SC converters. An output impedance analysis of the proposed converter is presented and compared with popular existing SC converters. The proposed converter is simulated in the OrCAD PSpice environment and the obtained results are presented. A 200 W hardware prototype of the proposed SC converter has been developed. Experimental results are presented to validate the efficacy of the proposed converter.

• The Transactions of the Korean Institute of Power Electronics
• /
• v.26 no.6
• /
• pp.411-420
• /
• 2021

In this paper, bidirectional LLC-LC resonant DC-DC converter with notch filters in the primary side of resonant circuits is proposed. Even if resonant capacitors are used on the primary and secondary sides, the proposed converter can operate with the high gain characteristics of the LLC resonant converter without mutual coupling of resonant capacitors, regardless of the direction of power flow. In addition, by applying notch filters, the proposed converter can operate with a wider gain control range and can cope with overload and short circuit. The analysis and operating characteristics of the proposed bidirectional LLC-LC resonant converter are investigated. A 3.3 kW prototyped bidirectional LLC-LC resonant converter connected to 750 V_DC buses is designed and tested to verify the validity and applicability of this proposed converter.

• JSTS:Journal of Semiconductor Technology and Science
• /
• v.16 no.5
• /
• pp.713-718
• /
• 2016

Predicting precise specifications of differential mixed-signal circuits is a difficult problem, because analytically derived correlation between process variations and conventional specifications exhibits the limited prediction accuracy due to the phase unbalance, for most self-tests. This paper proposes an efficient prediction technique to provide accurate specifications of differential mixed-signal circuits in a system-on-chip (SoC) based on a nonlinear statistical nonlinear regression technique. A spectrally pure sinusoidal signal is applied to a differential DUT, and its output is fed into another differential DUT through a weighting circuitry in the loopback configuration. The weighting circuitry, which is employed from the previous work [3], efficiently produces different weights on the harmonics of the loopback responses, i.e., the signatures. The correlation models, which map the signatures to the conventional specifications, are built based on the statistical nonlinear regression technique, in order to predict accurate nonlinearities of individual DUTs. In production testing, once the efficient signatures are measured, and plugged into the obtained correlation models, the harmonic coefficients of DUTs are readily identified. This work provides a practical test solution to overcome the serious test issue of differential mixed-signal circuits; the low accuracy of analytically derived model is much lower by the errors from the unbalance. Hardware measurement results showed less than 1.0 dB of the prediction error, validating that this approach can be used as production test.

• Proceedings of the IEEK Conference
• /
• 2002.06b
• /
• pp.149-152
• /
• 2002

The performance of a 1-bit DAC depends on that of the analog circuits. The mixed SC-CT (switched capacitor-continuous time) architecture is an effective design methodology for the analog circuits. This paper Proposes a new buffer scheme for the 1-bit digital-to-analog subconverter and a new SF-DSC(smoothing filter and differential-to-sig le converter) which performs both the smoothing filter and the differential-to-single convertor simultaneously.

• Journal of IKEEE
• /
• v.14 no.2
• /
• pp.90-97
• /
• 2010

The high efficiency power management IC(PMIC) with DTMOS(Dynamic Threshold voltage MOSFET) switching device and DTMOS Error Amplifier is presented in this paper. PMIC is controlled with PWM control method in order to have high power efficiency at high current level. Dynamic Threshold voltage CMOS(DT-CMOS) with low on-resistance is designed to decrease conduction loss. The control parts in Buck converter, that is, PWM control circuits consist of a saw-tooth generator, a band-gap reference circuit, an DT-CMOS error amplifier and a comparator circuit as a block. the proposed DT-CMOS Error Amplifier has 72dB DC gain and 83.5deg phase margin. also Error Amplifier that use DTMOS more than CMOS showed power consumption decrease of about 30%. DC-DC converter, based on Voltage-mode PWM control circuits and low on-resistance switching device is achieved the high efficiency near 96% at 100mA output current. And DC-DC converter is designed with Low Drop Out regulator(LDO regulator) in stand-by mode which fewer than 1mA for high efficiency.

• Journal of Power Electronics
• /
• v.15 no.3
• /
• pp.610-620
• /
• 2015

An inherent zero-voltage and zero-current-switching phase-shifted full-bridge converter with reverse-blocking insulated-gate bipolar transistor (IGBT) or non-punch-through IGBT is proposed in this paper. This converter not only ensures that the switches in the lagging leg works at zero-current switching, but also minimizes circulating conduction loss without any additional auxiliary circuits. A 1.2 kW hardware prototype is designed, fabricated, and tested to verify the proposed topology. The control loop design procedures with small-signal models are also presented. A simple, low-cost, and robust democratic current-sharing circuit is also introduced and verified in this study. The proposed converter is a suitable alternative for compact, cost-effective applications with high-voltage input.

• Journal of Power Electronics
• /
• v.7 no.3
• /
• pp.265-270
• /
• 2007

Equal rating DC-DC converter modules can be connected in series at the input for circuits requiring higher input voltages and in parallel at the output for circuits requiring higher output currents. Since the converter modules may not be practically identical, closed loop control has to ensure that each module equally shares the total input voltage and the load current. A control scheme consisting of a common output voltage loop, individual inner current loops and individual input voltage loops have been designed in this work to achieve input voltage and load current sharing as well as load voltage regulation under supply and load disturbances. The output voltage loop provides the basic reference for the inner current loops, which are also modified by the respective input voltage loops. The average of the converter input voltages, which is dynamically varying, is chosen as the reference for input voltage loops. This choice of reference eliminates interaction among different control loops. Type II compensators and Fuzzy Logic Controllers (FLCs) are designed and compared through MATLAB based simulation and FLC is found to be satisfactory. Hence TMS320F2407A DSP based FLC is implemented and the results are presented which prove the superiority of the FLC developed for this research.

• The Transactions of The Korean Institute of Electrical Engineers
• /
• v.56 no.7
• /
• pp.1250-1254
• /
• 2007

The multi-resonant(MR) converter has a characteristics that the parasitic components existing in the converter are absorbed into the resonant circuits. The designed MR converter could be got a high efficiency and a high power density because the switching power losses are reduced effectively due to resonant switching circuit. However, the high resonant voltage stress of switching power devices leads to the conduction loss. In this paper, it is proposed the novel alternated(AT) flyback multi-resonant converter to overcome such a drawback. The suggested converter dc input is divided by two series input filter capacitors. The resonant stress voltage is reduced to 2-3 times the input voltage without any complexity and it provides the various circuit schemes in lots of applications. The proposed flyback MR converter is verified through simulation and experiment.