• Journal of Korea Society of Digital Industry and Information Management
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• v.13 no.3
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• pp.35-42
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• 2017

This paper presents hardware implementation of background timing-skew calibration technique for time-interleaved analog-to-digital converters (TI ADCs). The timing skew between any two adjacent analog-digital (A/D) channels is detected by using pure digital Finite Impulse Response (FIR) delay filter. This paper includes hardware architecture of the system, main units and small sub-blocks along with control logic circuits. Moreover, timing diagrams of logic simulations using ModelSim are provided and discussed for further understanding about simulations. Simulation process in MATLAB and Verilog is also included and provided with basic settings need to be done. For hardware implementation it not practical to work with all samples. Hence, the simulation is conducted on 512 TI ADC output samples which are stored in the buffer simultaneously and the correction arithmetic is done on those samples according to the time skew algorithm. Through the simulated results, we verified the implemented hardware is working well.

• Transactions of the Korean Society of Mechanical Engineers A
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• v.32 no.11
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• pp.943-950
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• 2008

A novel nondestructive testing (NDT) system, which is able to detect a crack with high speed and high spatial resolution, is urgently required for inspecting small cracks on express train wheels. This paper proposes a high speed scan type magnetic camera, which uses the multiple amplifying circuits and the crack indicating pulse output system. The linearly integrated Hall sensors are arrayed in parallel, and the Hall voltages from each sensor in the scanning direction are obtained and amplified. High-speed NDT can be achieved by using the exclusive analog-digital converter and micro-processor because the ${\partial}\;V_H/\;{\partial}$ x value, which provides the most important crack information, can be obtained by buffering and calculating. The effectiveness of the novel method was verified by examine using cracks on the wheel specimen model.

• Journal of the Korean Society of Fisheries and Ocean Technology
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• v.28 no.3
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• pp.274-285
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• 1992

Among various Power converters, a variable voltage variable frequency (VVVF) three-phase PWM inverter is regarded as most promising power converter due to its capabilities, which permits the control of voltage, frequency and harmonic contents in a single power stage employing only on DC source. As a modulating technique of the PWM inverter, the regular sampling technique has rendered possible the on-line computation and generation of PWM control waveforms with a reasonably high switching frequencies. In this paper, microprocessor based three-phase regular samping PWM inverter with real-time control algorithm and control circuits for driving three phase AC motor has been developed. Harmocic components of PWM waveform were analized theoretically in terms of Bessel function series and then calculated by digital computer and observed with spectrum analyzer.

• Journal of the korean Society of Automotive Engineers
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• v.10 no.3
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• pp.45-50
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• 1988

The measurement system of the pressure in engine cylinder is developed with the aids of the microcomputer, A/D converter and simple electrical circuits. The experiment is performed in 4 cycle single cylinder Gasoline engine. When data for the pressure progress is sampled, clock signal or signal from the crank angle is used as trigger. The variation of the pressure during the cycles can be well obtained experimentally. So, the informations which are necessary in the combustion analysis, i.e. expansion pressure, indicated mean effective pressure, the magnitude and time of the maximum pressure ignition time, the rate of pressure rise and heat release and combustion rates can be obtained by the calculation using experimental data. Also, the informations about the after-burning process, the existence of the detonation waves and end time of combustion can be investigated from this study.

• International Journal of Automotive Technology
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• v.4 no.2
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• pp.57-64
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• 2003

The Intelligent Power Unit (IPU) utilized in Honda's Civic Hybrid Integrated Motor Assist (IMA) system was developed with the aim of making every component lighter, more compact and more efficient than those in the former model. To reduce energy loss, inverter efficiency was increased by fine patterning of the Insulated Gate Bipolar Transistor (IGBT) chips, 12V DC-DC converter efficiency was increased by utilizing soft-switching, and the internal resistance of the IMA battery was lowered by modifying the electrodes and the current collecting structure. These improvements reduced the amount of heat generated by the unit components and made it possible to combine the previously separated Power Control Unit (PCU) and battery cooling systems into a single system. Consolidation of these two cooling circuits into one has reduced the volume of the newly developed IPU by 42% compared to the former model.

• Proceedings of the KIEE Conference
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• 2006.07b
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• pp.939-940
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• 2006

An integrated inductor using the low-temperature co-fired ceramics(LTCC ) technology for low-power electronics was fabricated. In the inductor NiZn ferrite sheet(${\mu}_r=230$), was embedded to increase inductance. The inductor has Ag spiral coil with 14 turns($7turns{\times}2layers$), a dimension of 0.6mm in width, 10um in thickness, and 0.15mm pitch. To evaluate the inductance, including the parasitic resistance, the fabricated inductor was calculated and measured. It was confirmed that calculated values were very close to the measured values. Finally as an application of the LTCC integrated inductor to low power electronic circuits, a LTCC buck DC/DC converter with 1W output power and up to 0.5MHz switching frequency using the inductor fabricated was develop.

• The Transactions of the Korean Institute of Electrical Engineers P
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• v.52 no.4
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• pp.148-153
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• 2003

In this paper, the low voltage 3V Sigma-Delta Digital Analog Converter(DAC) is designed for using in the transmitter of ADSL analog front-end. We have developed the CMOS DAC according to ANSI T1.413-2(DMT) standard specifications of the chip. The designed 4th-order DAC is composed of three block which are 1-bit DAC, 1st-order Switched-Capacitor filter and analog active 2nd-order Resistor-Capacitor(RC) filter. The HSPICE simulation of the designed DAC showing 65db SNR, is connected with 1.1MHz continuous lowpass filter. And also, we have performed the circuits verification and layout verification(ERC, DRC, LVS) followed by fabrication using TSMC 2-poly 5-metal p-substrate CMOS $0.35{\mu}m$ processing parameter. Finally, the chip testing has been performed and presented in the results.

• Proceedings of the KIEE Conference
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• 1998.07a
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• pp.73-75
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• 1998

In this paper, a transient analysis method of Switched Reluctance Motors(SRM) is presented. The Finite Element Method(FEM) is used to model the nonlinear magnetic field and is coupled to the power circuits and mechanical system. The time derivative term in the differential equation is formulated by the time difference method. The proposed method is applied to a 4 phase 16/12 SRM to study starting characteristics and an fault due to the failure of a transistor in the converter.

• Journal of international Conference on Electrical Machines and Systems
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• v.1 no.1
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• pp.121-127
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• 2012

An electric power compensation system for a DC transmission system with an integrated wind turbine generator is proposed. The proposed compensation system consists of a synchronous generator and a duplex reactor. This apparatus is connected to the sending-end circuit of the DC transmission system. A set of steady-state equations of the system is first derived. Then, the effect of the duplex reactor, which can eliminate the sending-end grid current distortion due to commutation of the converter, is explored. The relationships among power at the sending-end circuit are also revealed. It is shown that fluctuations in the sending-end grid power due to changes in wind velocities are compensated with the proposed system. Finally, the effects of the sending-end grid conditions on the steady-state characteristics of the system are studied.

• Journal of Semiconductor Engineering
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• v.1 no.2
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• pp.64-73
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• 2020

As CMOS technology scales down, the design of analog signal processing circuit becomes far more difficult because of steadily decreasing supply voltage and smaller intrinsic gain of transistors. With sub-1V supply voltage, the conventional analog signal processing relying on high-gain amplifiers is not an effective solution and different approach has to be sought. One of the promising approaches is "time-domain analog signal processing" which exploits the improving switching speed of transistors in a scaled CMOS technology. In this paper, various time-domain analog signal processing techniques are explained with some experimental results.