• Journal of the Korean Society of Manufacturing Technology Engineers
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• v.20 no.6
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• pp.756-760
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• 2011

This paper proposed an alignment stage driven by piezo actuators for alignment process of a contact-type lithography. Among contact-type lithography processes, an UV-curable nanoimprint process is an unique process to be able to align patterns on upper and lower layers. An alignment stage of the UV-curable nanoimprint process requires nano-level resolution as well as high stiffness to overcome friction force due to contact moving. In this paper, the alignment stage consists of a compliant mechanism using flexure hinges, piezo actuators for high force generation, and capacitive sensors for high-resolution measurement. The compliant mechanism is implemented by four prismatic-prismatic compliant chains for two degree-of-freedom translations. The compliant mechanism is composed of flexure hinges with high stiffness, and it is directly actuated by the piezo actuators which increases the stiffness of the mechanism, also. The performance of the ultra-precision stage is demonstrated by experiments.

• Journal of the Korean Society of Manufacturing Technology Engineers
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• v.20 no.4
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• pp.395-400
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• 2011

Scanning Probe Lithography is a method to localized oxidation on single crystal silicon wafer surface. This study demonstrates nanometer scale non contact lithography process on (100) silicon (p-type) wafer surface using AFM(Atomic force microscope) apparatuses and pulse controlling methods. AFM-based experimental apparatuses are connected the DC pulse generator that supplies ultra short pulses between conductive tip and single crystal silicon wafer surface maintaining constant humidity during processes. Then ultra short pulse durations are controlled according to various experimental conditions. Non contact lithography of using ultra short pulse induces electrochemical reaction between micro-scale tip and silicon wafer surface. Various growths of oxides can be created by ultra short pulse non contact lithography modification according to various pulse durations and applied constant humidity environment.

• JSTS:Journal of Semiconductor Technology and Science
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• v.1 no.1
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• pp.20-30
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• 2001

A 1.8V $650{\;}\textrm{mm}^2$ 4Gb DRAM having $0.10{\;}\mu\textrm{m}^2$ cell size has been successfully developed using 0.11 $\mu\textrm{m}$DRAM technology. Considering manufactur-ability, we have focused on developing patterning technology using KrF lithography that makes $0.11{\;}\mu\textrm{m}$ DRAM technology possible. Furthermore, we developed novel DRAM technologies, which will have strong influence on the future DRAM integration. These are novel oxide gap-filling, W-bit line with stud contact for borderless metal contact, line-type storage node self-aligned contact (SAC), mechanically stable metal-insulator-silicon (MIS) capacitor and CVD Al process for metal inter-connections. In addition, 80 nm array transistor and sub-80 nm memory cell contact are also developed for high functional yield as well as chip performance. Many issues which large sized chip often faces are solved by novel design approaches such as skew minimizing technique, gain control pre-sensing scheme and bit line calibration scheme.

• Journal of the Semiconductor & Display Technology
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• v.12 no.2
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• pp.79-84
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• 2013

Nanoimprint lithography (NIL) is the next generation photolithography process in which the photoresist is dispensed onto the substrate in its liquid form and then imprinted and cured into a desired pattern instead of using traditional optical system. There have been considerable attentions on NIL due to its potential abilities that enable cost-effective and high-throughput nanofabrication to the display device and semiconductor industry. Although one of the current major research trends of NIL is large-area patterning, the technical difficulties to keep the uniformity of the residual layer become severer as the imprinting area increases more and more. In this paper, with the rolling type imprinting process, a mold, placed upon the $2^{nd}$ generation TFT-LCD glass sized substrate($370{\times}470mm^2$), is rolled by a rubber roller to achieve a uniform residual layer. The prediction of residual layer thickness of the photoresist by rolling of the rubber roller is crucial to design the rolling type imprinting process, determine the rubber roller operation conditions-mpressing force & feeding speed, operate smoothly the following etching process, and so forth. First, using the elasticity theory of contact problem and the empirical equation of rubber hardness, the contact length between rubber roller and mold is calculated with consideration of the shape and hardness of rubber roller and the pressing force to rubber roller. Next, using the squeeze flow theory to photoresist flow, the residual layer thickness of the photoresist is calculated with information of the viscosity and initial layer thickness of photoresist, the shape of mold pattern, feeding speed of rubber roller, and the contact length between rubber roller and mold previously calculated. Last, the effects of rubber roller operation conditions, impressing force & feeding speed, on the residual layer thickness are analyzed with consideration of the shape and hardness of rubber roller.

• Bulletin of the Korean Chemical Society
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• v.35 no.3
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• pp.731-736
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• 2014

An organic junction transistor with a vertical structure based on an active layer of poly(3-hexylthiophene) was fabricated by facile micro-contact printing combined with the Langmuir-Schaefer technique, without conventional e-beam or photo-lithography. Direct printing and subsequent annealing of Au-nanoparticles provided control over the thickness of the Au electrode and hence control of the electrical contact between the Au electrode and the active layer, ohmic or Schottky. The junction showed similar current-voltage characteristics to an NPN-type transistor. Current through the emitter was simply controllable by the base voltage and a high transconductance of ~0.2 mS was obtained. This novel fabrication method can be applied to amplifying or fast switching organic devices.

• KSTLE International Journal
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• v.6 no.2
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• pp.33-38
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• 2005

Submicron-scale patterns made of polymethyl methacrylate (PMMA) were fabricated on silicon-wafer using a capillarity-directed soft lithographic technique. Polyurethane acrylate (PUA) stamps (Master molds) were used to fabricate the patterns. Patterns with three different aspect ratios were fabricated by varying the holding time. The patterns fabricated were the negative replica of the master mold. The patterns so obtained were investigated for their adhesion and friction properties at nano-scale using AFM. Friction tests were conducted in the range of 0-80 nN. Glass (Borosilicate) balls of diameter 1.25 mm mounted on cantilever (Contact Mode type NPS) were used as tips. Further, micro-friction tests were performed using a ball-on-flat type micro-tribe tester, under reciprocating motion, using a soda lime ball (1 mm diameter) under a normal load of 3,000 mN. All experiments were conducted at ambient temperature ($24{\pm}1^{\circ}C$) and relative humidity ($45{\pm}5\%$). Results showed that the patterned samples exhibited superior tribological properties when compared to the silicon wafer and non-patterned sample (PMMA thin film) both at the nano and micro-scales, owing to their increased hydrophobicity and reduced real area of contact. In the case of patterns it was observed that their morphology (shape factor and size factor) was decisive in defining the real area of contact.

• Proceedings of the Korean Vacuum Society Conference
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• 2011.08a
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• pp.252-252
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• 2011

최근 주목받고 있는 amorphous gallium-indium-zinc-oxide (a-GIZO) thin film transistors (TFTs)는 수소가 첨가된 비정질 실리콘 TFT에 비해 높은 이동도와 뛰어난 전기적, 광학적 특성에 의해 큰 주목을 받고 있다. 또한 넓은 밴드갭을 가지므로 가시광 영역에서 투명한 특성을 보이고, 플라스틱 기판 위에서 구부러지는 성질에 의해 플랫 패널 디스플레이나 능동 유기 발광소자 (AM-OLED), 투명 디스플레이에 응용되고 있다. 뿐만 아니라, 일반적인 Poly-Si TFT는 자체적으로 가지는 결정성에 의해 대면적화 시 균일성이 좋지 못하지만 GIZO는 비정질상 이기 때문에 백플레인의 대면적화에 유리하다는 장점이 있다. 이러한 TFT를 제작하기 전, 전기적 특성에 대한 정보를 얻거나 예측하는 것이 중요한데, 이에 따라 고안된 구조가 바로 metal point contact FET (pseudo FET)이다. pseudo FET은 소스/드레인 전극을 따로 증착할 필요 없이 채널을 증착한 후, 프로브 탐침을 채널의 표면에 적당한 압력으로 접촉시켜 전하를 공급하는 소스와 드레인처럼 동작시킬 수 있다. 따라서 소스/드레인을 증착하거나 lithography와 같은 추가적인 공정을 요구하지 않아 소자의 특성을 보다 간단하고 수월하게 분석할 수 있다는 장점이 있다. 본 연구에서는 p-type 기판위에 100nm의 oxidation SiO2를 게이트 절연막으로 사용하는 a-GIZO pseudo FET를 제작하였다. 소자 제작 후, 열처리 온도에 따른 전기적 특성을 분석하였고, 열처리 조건은 30분간 N2 분위기에서 실시하였다. 열처리 후 전기적 특성 분성 결과, 450oC에서 가장 낮은 subthreshold swing 값과 게이트 전압의 더블 스윕 후 문턱 전압의 변화가 거의 없음을 확인하였다.

• Proceedings of the PSK Conference
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• 2003.10b
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• pp.67.3-68
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• 2003

The purpose of this study is to improve repeatability of a non-invasive blood glucose measurement. The portable NIR system that was newly integrated by our lab includes a tungsten halogen lamp, a specialized reflectance fiber optic probe and a photo diode array type InGaAs detector, which was developed by a microchip technology based on the lithography. Reflectance NIR spectra of finger tip were recorded by using a fiber optic probe. The probe was fixed in the system and subjects put their finger on the probe head. (omitted)

• Journal of the Korean Vacuum Society
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• v.20 no.5
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• pp.339-344
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• 2011

The Ohmic contact of Ti/Au metals on n-type ZnO thin film deposited on c-plane sapphire substrates by pulsed laser deposition was investigated by TLM (transfer length method) patterns. The Ti/Au metal films with thickness of 35 nm and 90 nm were deposited by electron-beam evaporator and thermal evaporator, respectively. By using the photo-lithography method, the $100{\times}100{\mu}m^2$ TLM patterns with $6{\sim}61{\mu}m$ gaps were formed. To improve the electrical properties as well as to decrease an interface states and stress between metal and semiconductor, the post-annelaing process was done in oxygen ambient by rapid thermal annealing system at temperature of $100{\sim}500^{\circ}C$ for 1 min. In this study, it appeared that the minimum specific contact resistivity shows about $1.1{\times}10^{-4}{\Omega}{\cdot}cm^2$ in $300^{\circ}C$ annealed sample, which may be originated from formation of oxygen vacancies of ZnO during an oxidation of Ti metal at the interface of Ohmic contacts.

• Korean Journal of Optics and Photonics
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• v.15 no.1
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• pp.79-85
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• 2004

We report on a transmittance controlled photomask with phase patterns on the back quartz surface. Theoretical analysis for changes in illumination pupil shape with respect to the variation of size and density of backside phase patterns and experimental results for improvement of critical dimension uniformity on a wafer by using the transmittance controlled photomask are presented. As phase patterns for controlling transmittance of the photomask we used etched contact-hole type patterns with 180" rotative phase with respect to the unetched region. It is shown that pattern size on the backside of the photomask must be made as small as possible in order to keep the illumination pupil shape as close as possible to the original pupil shape and to achieve as large an illumination intensity drop as possible at a same pattern density. The distribution of illumination intensity drop suitable for correcting critical dimension error was realized by controlling pattern density of the contact-hole type phase patterns. We applied this transmittance controlled photomask to a critical layer of DRAM (Dynamic Random Access Memory) having a 140nm design rule and could achieve improvement of the critical dimension uniformity value from 24.0 nm to 10.7 nm in 3$\sigma$.TEX>.