• Title/Summary/Keyword: Computation Design

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Wind Load Analysis owing to the Computation Fluid Dynamics and Wind Tunnel Test of a Container Crane (컨테이너 크레인의 전산유동해석과 풍동실험에 의한 풍하중 분석)

  • Lee, Su-Hong;Han, Dong-Seop;Han, Geun-Jo
    • Journal of Navigation and Port Research
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    • v.33 no.3
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    • pp.215-220
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    • 2009
  • Container cranes are vulnerable structure to difficult weather conditions bemuse there is no shielding facility to protect them from strong wind. This study was carried out to analyze the effect of wind load on the structure of a container crane according to the change of the boom shape using wind tunnel test and computation fluid dynamics. And we provide a container crane designer with data which am be used in a wind resistance design of a container crane assuming that a wind load 75m/s wind velocity is applied in a container crane. In this study, we applied mean wind load conformed to 'Design Criteria of Wind Load' in 'Load Criteria of Building Structures' and an external fluid field was divided as interval of 10 degrees to analyze the effect according to a wind direction. In this conditions, we carried out the wind tunnel test and the computation fluid dynamic analysis and than we analyzed the wind load which was needed to design the container crane.

Hardware Design of Efficient SAO for High Performance In-loop filters (고성능 루프내 필터를 위한 효율적인 SAO 하드웨어 설계)

  • Park, Seungyong;Ryoo, Kwangki
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2017.10a
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    • pp.543-545
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    • 2017
  • This paper describes the SAO hardware architecture design for high performance in-loop filters. SAO is an inner module of in-loop filter, which compensates for information loss caused by block-based image compression and quantization. However, HEVC's SAO requires a high computation time because it performs pixel-unit operations. Therefore, the SAO hardware architecture proposed in this paper is based on a $4{\times}4$ block operation and a 2-stage pipeline structure for high-speed operation. The information generation and offset computation structure for SAO computation is designed in a parallel structure to minimize computation time. The proposed hardware architecture was designed with Verilog HDL and synthesized with TSMC chip process 130nm and 65nm cell library. The proposed hardware design achieved a maximum frequency of 476MHz yielding 163k gates and 312.5MHz yielding 193.6k gates on the 130nm and 65nm processes respectively.

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New Echo Canceller using Adaptive Cascaded System Identification Algorithm (적응 다단 시스템 식별 알고리듬을 이용한 새로운 반향제거기)

  • Kwon, Oh Sang
    • Journal of Korea Society of Digital Industry and Information Management
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    • v.10 no.1
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    • pp.113-120
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    • 2014
  • In this paper, I present a new echo canceller using the adaptive cascade system identification (CSI) method, which a system response is divided into several responses so that each response is adaptively estimated and combined. Echo cancellation is required for a dual-duplex DSL, in order to allow each individual loop to operate in a full duplex fashion. Echo cancellation was one of the most difficult aspects of DSL design, requiring high linearity and total echo return loss in excess of 70 dB. Especially, for a fickle response, if the response is estimated by an adaptive filter, the filter needs more taps and the performance is decreased. But the response is divided into several responses, the computation complexities are decreased and the performance is increased. For the stage constant n, which represents the number of stages, if the response is not divided (n=1), the computation complexity of multiply is $2N^2$. And if the response is divided into two responses (n=2), the computation complexity of multiply is $2N^2$. Also, if n=3, the computation complexity is ${\frac{2}{3}}N^2$. Therefore, it is known that the computation complexity is decreased as n is increased. Finally, this proposed method is verified through simulation of echo canceller for digital subscriber line (DSL) application.

A Design of Parallel Processing for Wavelet Transformation on FPGA (ICCAS 2005)

  • Ngowsuwan, Krairuek;Chisobhuk, Orachat;Vongchumyen, Charoen
    • 제어로봇시스템학회:학술대회논문집
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    • 2005.06a
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    • pp.864-867
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    • 2005
  • In this paper we introduce a design of parallel architecture for wavelet transformation on FPGA. We implement wavelet transforms though lifting scheme and apply Daubechies4 transform equations. This technique has an advantage that we can obtain perfect reconstruction of the data. We divide our process to high pass filter and low pass filter. With this division, we can find coefficients from low and high pass filters simultaneously using parallel processing properties of FPGA to reduce processing time. From the equations, we have to design real number computation module, referred to IEEE754 standard. We choose 32 bit computation that is fine enough to reconstruct data. After that we arrange the real number module according to Daubechies4 transform though lifting scheme.

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Virtual Prototyping of Area-Based Fast Image Stitching Algorithm

  • Mudragada, Lakshmi Kalyani;Lee, Kye-Shin;Kim, Byung-Gyu
    • Journal of Multimedia Information System
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    • v.6 no.1
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    • pp.7-14
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    • 2019
  • This work presents a virtual prototyping design approach for an area-based image stitching hardware. The virtual hardware obtained from virtual prototyping is equivalent to the conceptual algorithm, yet the conceptual blocks are linked to the actual circuit components including the memory, logic gates, and arithmetic units. Through the proposed method, the overall structure, size, and computation speed of the actual hardware can be estimated in the early design stage. As a result, the optimized virtual hardware facilitates the hardware implementation by eliminating trail design and redundant simulation steps to optimize the hardware performance. In order to verify the feasibility of the proposed method, the virtual hardware of an image stitching platform has been realized, where it required 10,522,368 clock cycles to stitch two $1280{\times}1024$ sized images. Furthermore, with a clock frequency of 250MHz, the estimated computation time of the proposed virtual hardware is 0.877sec, which is 10x faster than the software-based image stitch platform using MATLAB.

Design Optimization on Wastewater Treatment Pump of Satisfaction for High Head and Low Flow Rate (고양정 및 저유량을 만족하는 폐수처리용 펌프 설계 최적화)

  • KIM, SUNG;KIM, JIN-HYUK
    • Journal of Hydrogen and New Energy
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    • v.33 no.5
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    • pp.583-590
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    • 2022
  • In this paper, the performance characteristics of the 2 vane pump for wastewater treatment were investigated using response surface method(RSM) with commercial computation fluid dynamics(CFD) software. Design variables of wastewater treatment pump were defined with the meridional plane of the 2 vane pump impeller. The objective functions were defined as the total head and the efficiency at the design flow rate. The hydraulic performance of optimum model was verified by numerical analysis and the reliability of the model was retained by comparison of numerical analysis and comparative analysis with the reference model.

A Numerical Study on the Improvement of Performance for the 2 Vane Pump Impeller (2 Vane 펌프 임펠러의 성능 개선에 관한 수치해석적 연구)

  • KIM, SUNG;MA, SANG-BUM;CHOI, YOUNG-SEOK;KIM, JIN-HYUK
    • Journal of Hydrogen and New Energy
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    • v.31 no.3
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    • pp.293-301
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    • 2020
  • This paper describes a numerical study on the improvement of performance of the 2 vane pump impellers. The design of these impellers was optimized using a commercial computation fluid dynamics code and design of experiments. Geometric design variables were defined by the impeller blade angle distribution. The objective functions were defined as the total head, total efficiency and solid material size of the impellers. The importance of the geometric design variables was analyzed using 2k factorial designs. The interaction between the total head, total efficiency and solid material size, according to the impeller blade angle distribution, is discussed by analyzing the 2k factorial design results.

A Study for the Development of Pile Design Method Considering Settlement and Compression (침하량과 압축량을 고려한 말뚝의 설계법 개발을 위한 연구)

  • Lim, Jong-Seok;Ha, Hyuk;Jung, Sang-Kyun
    • Proceedings of the Korean Geotechical Society Conference
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    • 2006.03a
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    • pp.1287-1294
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    • 2006
  • A pile is compressed with settlements when loading and bearing capacity is altered along relative displacement of pile/soil on settlement and compression. Settlements of pile displaying limit skin friction is different from displaying tip resistance. Therefore, it is an error in traditional method that bearing capacity of pile is estimated from the sum of limit skin fraction and tip resistance. Accordingly, development of design method considering behavior of load-settlement is needed. In this study, we would like to establish the base for development of design method considering bearing capacity altering along displacement on settlement and compression. For this, we established system and substance of design method. And in order to establish relationship of load-settlement of pile on the type of soil, we analyzed and arranged existing database and pile loading test. On design method, settlement is assumed gradually on each capacity level being assumed gradually. Bearing capacity developing on the pile is obtained on each settlement level. Until the obtained bearing capacity will be equal to assumed capacity, this process is continued with increasing settlement. Load-settlement curve for soil classification is sketched in the process computing settlement on assumed capacity. This design method will be materialized by computation program.

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Estimation of Design Rainfall Based on Climate Change Scenario in Jeju Island (기후변화 시나리오를 고려한 제주도 확률강우량 산정)

  • Lee, Jun-Ho;Yang, Sung-Kee;Jung, Woo-Yul;Yang, Won-Seok
    • Journal of Environmental Science International
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    • v.24 no.4
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    • pp.383-391
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    • 2015
  • As occurrence of gradually increasing extreme temperature events in Jeju Island, a hybrid downscaling technique that simultaneously applies by dynamical method and statistical method has implemented on design rainfall in order to reduce flood damages from severe storms and typhoons.As a result of computation, Case 1 shows a strong tendency to excessively compute rainfall, which is continuously increasing. While Case 2 showed similar trend as Case 1, low design rainfall has computed by rainfall in A1B scenario. Based on the design rainfall computation method mainly used in Preventive Disaster System through Pre-disaster Effect Examination System and Basic Plan for River of Jeju Island which are considering climatic change for selecting 50-year and 100-year frequencies. Case 3 selecting for Jeju rain gage station and Case 1 for Seogwipo rain gage station. The results were different for each rain gage station because of difference in rainfall characteristics according to recent climatic change, and the risk of currently known design rainfall can be increased in near future.

Optimal Design of PM Wind Generator using Memetic Algorithm (Memetic Algorithms을 적용한 영구자석 풍력발전기 최적설계)

  • Park, Ji-Seong;Ahn, Young-Jun;Kim, Jong-Wook;Lee, Chel-Gyun;Jung, Sang-Yong
    • Proceedings of the KIEE Conference
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    • 2009.04b
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    • pp.6-8
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    • 2009
  • This paper presents the novel implementation of memetic algorithm with GA (Genetic Algorithm) and MADS (Mesh Adaptive Direct Search), which is applied for optimal design methodology of electric machine. This hybrid algorithm has been developed for obtaining the global optimum rapidly, which is effective for optimal design of electric machine with many local optima and much longer computation time. In particular, the proposed memetic algorithm has been forwarded to optimal design of direct-driven PM wind generator for maximizing the Annual Energy Production (AEP), of which design objective should be obtained by FEA (Finite Element Analysis). After all, it is shown that GA combined with MADS has contributed to reducing the computation time effectively for optimal design of PM wind generator when compared with purposely developed GA implemented with the parallel computing method.

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