• Journal of international Conference on Electrical Machines and Systems
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• 제2권3호
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• pp.275-282
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• 2013

Applications such as vibration isolation, gravity compensation, pick-and-place machines, etc., would benefit from (long-stroke) cylindrical/tubular permanent magnet (PM) actuators with integrated passive gravity compensation to minimize the power consumption. As an example, in component placing (pick-and-place) machines on printed circuit boards, passive devices allow the powerless counteraction of translator including nozzles or tooling bits. In these applications, an increasing demand is arising for high-speed actuation with high precision and bandwidth capability mainly due to the placement head being at the foundation of the motion chain, hence, a large mass of this device will result in high force/power requirements for the driving mechanism (i.e. an H-bridge with three linear permanent magnet motors placed in an H-configuration). This paper investigates a tubular actuator topology combined with passive gravity compensation. These two functionalities are separately introduced, where the combination is verified using comprehensive three dimensional (3D) finite element analyses.

• 한국컴퓨터정보학회논문지
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• 제21권2호
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• pp.97-103
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• 2016

This paper deals with the cycle time minimization problem that determines the productivity in printed circuit board (PCB) with n components using the m placement machines. This is known as production cycle time determination problem (PCTDP). The polynomial time algorithm to be obtain the optimal solution has been unknown yet, therefore this hard problem classified by NP-complete. This paper gets the initial assignment result with the machine has minimum unit placement time per each component firstly. Then, the balancing process with reallocation from overhead machine to underhead machine. Finally, we perform the swap optimization and get the optimal solution of cycle time $T^*$ within O(mn) computational complexity. For experimental data, the proposed algorithm can be obtain the same result as integer programming+branch-and-bound (IP+B&B) and B&B.

• 마이크로전자및패키징학회지
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• 제8권2호
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• pp.37-42
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• 2001

The BGA package has been the area array package of choice for several years. Recently, the transition has been to finer pitch configurations called Chip Scale Packages (CSP). Several of these package types are available at 0.5 mm pitch. requiring surface mount assemblers to evaluate and optimize various elements of the assembly process. This presentation describes the issues associated with making the transition from BGA to CSP assembly. Areas addressed will include the accuracy of pick and place equipment, printed wiring board lines and spaces, PWB vias, in-circuit test issues, solder paste printing, moisture related factors, rework and reliability. The transition to 0.5 mm pitch requires careful evaluation of the board design, solder paste selection, stencil design and component placement accuracy. At this pitch, ball and board pad diameters can be as small as 0.25 mm and 0.20 mm respectively. Drilled interstitial vias are no longer possible and higher ball count packages require micro-via board technology. The transition to CSP requires careful evaluation of these issues. Normal paste registration and BGA component tolerances can no longer achieve the required process levels and higher accuracy pick and place machines need to be implemented. This presentation will examine the optimization of these critical assembly operations, contrast the challenges at 0.5 mm and also look at the continuation of the process to incorporate smaller pitch flip chip devices.

• 한국마이크로전자및패키징학회:학술대회논문집
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• 한국마이크로전자및패키징학회 2001년도 Proceedings of 6th International Joint Symposium on Microeletronics and Packaging
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• pp.27-34
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• 2001

The BGA Package has been the area array package of choice for several rears. Recently, the transition has been to finer pitch configuration called Chip Scale Packages (CSP). Several of these package types are available at 0.5 mm pitch, requiring surface mount assemblers to evaluate and optimize various elements of the assembly process. This presentation describes the issues associated with making the transition from BGA to CSP assembly. Areas addressed will include the accuracy of pick and piece equipment, printed wiring board lines and spaces, PWB vias, in-circuit test issues, solder paste printing, moisture related factors, rework and reliability. The transition to 0.5 mm pitch requires careful evaluation of the board design, solder paste selection, stencil design and component placement accuracy. At this pitch, ball and board pad diameters can be as small as 0.25 mm and 0.20 mm respectively. Drilled interstitial vias are no longer possible and higher ball count packages require micro-via board technology. The transition to CSP requires careful evaluation of these issues. Normal paste registration and BGA component tolerances can no longer achieve the required process levels and higher accuracy pick and place machines need to be implemented. This presentation will examine the optimization of these critical assembly operations, contrast the challenges at 0.5 mm and also look at the continuation of the process to incorporate smaller pitch flip chip devices.

• 정보처리학회논문지:소프트웨어 및 데이터공학
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• 제1권3호
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• pp.137-148
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• 2012

사용자들은 자신의 작업을 처리하기 위해 자신에게만 한정된 가상 컴퓨팅 자원을 클라우드 서비스 제공자로부터 할당 받아 타 사용자로부터 독립된 환경에서 작업을 처리하게 된다. 이를 자동화된 방법으로 최적화를 대신 수행해주기 위한 모델로 브로커 미들웨어가 제시되었고 마감시간을 만족하는 이내에서 자원 이용률을 높이는 접근법으로 필요 가상 머신의 숫자를 줄여 비용을 절약한다. 이를 다루는 많은 논문들에서 작업 스케줄링은 기존 사용자들간의 독립을 보장하여 하나의 가상 머신이 하나의 작업에 한정된 가상 머신에서 처리하는 방식으로 다루어지고 있다. 하지만 기존의 SRSV 방식에서는 높은 정도의 다중 프로그래밍 작업이 아닐 경우 시스템을 효율적으로 사용하지 못한다. 이에 본 논문에서는 해당 자원을 마감시간과 스래싱(thrashing), 문맥 전환(context switching)에 따른 성능 저하를 고려한 상태에서 다중 프로그래밍 정도를 높여 낭비되는 자원을 최소화하여 비용을 절약하려고 한다. 실험 결과를 통해 제안하는 방법이 제약조건 이내에서 기존의 방식에 비해 좀 더 좋은 가격 대비 성능을 가지는 것을 보인다.