• Title/Summary/Keyword: Compiler Development

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Design and Implementation of OSEK/VDX Development Tool for Automotive Applications (OSEK/VDX 기반의 차량 전장용 응용개발도구 설계 및 구현)

  • Ahn, SungHo;Kim, JaeYoung;Kim, GwangSu
    • IEMEK Journal of Embedded Systems and Applications
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    • v.4 no.2
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    • pp.84-89
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    • 2009
  • This paper describes the development tool for applications of automotive electronic control unit based on OSEK/VDX. This development tool has a plug-in structure and is written in Java language, because of being based on Eclipse CDT. And also this development tool has another functionality of expansion, which means a special function block can be easily adopted in this development tool. Currently, this development tool consists of five blocks, which are integrated development environment block, fusing program block, system generation block, debugger block, and cross-compiler toolchain block. They have relationship between each other and work for developing OSEK/VDX-based applications. In this paper, we show the functionality of each block of this development tool and its implementation.

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The Design of a Functional Language which has an Annotation Syntax and Implmentation of the Front-end of the Translator for the Language (Annotation을 가지는 함수언어의 설계 및 번역기 전반부 구현)

  • 최관덕
    • Journal of the Korea Society of Computer and Information
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    • v.3 no.1
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    • pp.25-34
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    • 1998
  • There are two major method for expressing parallelim in functional languages. The one is the strictness analysis and the other the annotation. The strictness analysis is a method that a compiler detects parallelism and expresses the detected information in the object program. The annotation is a method that a programmer detects parallelism and expresses in the source program. This study is on the annotation and is aimed at construction of a translator for a functional language which has an annotation syntax. The translator translates a source program to enriched lambda-calculus graphs. The translator is implemented in C using compiler development tools such as YACC and Lex, under UNIX environments. In this paper we present the design and implementation techniques for developing the front-end of the translator.

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Design and Implementation of the ETRI CHILL-96 Compiler (ETRI CHILL - 96 컴파일러의 설계와 구현)

  • Kim, Sang-Eun;Lee, Joon-Kyung;Lee, Dong-Gill
    • Journal of KIISE:Computing Practices and Letters
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    • v.6 no.3
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    • pp.329-338
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    • 2000
  • CHILL language has been used for the software development of electronic switching and telecommunications system. ETRI CHILL-96 language is an extended CHILL language with the notions of object-orientation, concurrency, and generic type. In this paper, we discuss some design and implementation issues of ETRI CHILL-96 compiler. Renaming translation rules and function restructuring techniques are adapted for the purpose of preventing name conflict and producing debugging information. Those new extended features are preprocessed in the compilation and translated to extended CHILL intermediate codes. Such compilation technique enables ETRI CHILL-96 language to hold compatibility with software developed by CHILL language.

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Development of a Programming System for Sequential Control Using a Graphic Organization Language (그래픽 조직 언어를 이용한 순차 제어용 프로그래밍 시스템 개발)

  • Kuk, Kum-Hoan
    • Journal of the Korean Society for Precision Engineering
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    • v.13 no.4
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    • pp.24-33
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    • 1996
  • PLCs are vital components of modern automation systems, which have penetrated into almost every industry. Many industries have a demand for facilitation of PLC programming. In this study, a programning system for sequential control is developed on a personal computer. This programming system consists of two main parts, a GRAFCET editor and a GRAFCET compiler. The GRAFCET editor enables us to model an actual sequential process by a GRAFCET diagram. This GRAFCET editor is developed by the menu-driven method based on specific menus and graphic symbols. The GRAFCET compiler consists of two parts, a GRAFCET parser and a code generator. The possible errors in a drawn GRAFCET diagram are first checked by the GRAFCET parser which generates finally an intermediate code from a verified CRAFCET diagram. Then the intermediate code is converted into a control code of an actual sequential controller by the code generator. To show the usefulness of this programming system, this system is applied to a pneumatically controlled handling robot. For this robot, a Z-80 microprocessor is used as the actual sequential controller.

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A Study on a Secure Coding Library for the Battlefield Management System Software Development (전장정보체계 SW 개발을 위한 시큐어 코딩 라이브러리에 관한 연구)

  • Park, Sanghyun;Kim, Kwanyoung;Choi, Junesung
    • Journal of IKEEE
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    • v.22 no.2
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    • pp.242-249
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    • 2018
  • In this paper, we identify the code vulnerabilities that can be automatically detected through Visual Studio (VS) compiler and code analyzer based on a secure coding rule set which is optimized for development of battlefield information system. Then we describe a weak point item that can be dealt with at the implementation stage without depending on the understanding or ability of the individual programmer's secure coding through the implementation of the secure coding library. Using VS compiler and the code analyzer, the developers can detect only about 38% of security weaknesses. But with the help of the proposed secure coding library, about 48% of security weaknesses can be detected and prevented in the proactive diagnosis in the development stage.

Program Translation from Conventional Programming Source to Java Bytecode (기존 프로그래밍 원시코드에서 자바 바이트 코드로의 변환)

  • Jeon-Geun Kang;Haeng-Kon Kim
    • Journal of the Korea Computer Industry Society
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    • v.3 no.8
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    • pp.963-980
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    • 2002
  • Software reengineering is making various research for solutions against problem of maintain existing systems. Reengineering has a meaning of development of software on exizting systems through the reverse engineering auf forward engineering. Most of the important concepts used in reengineering is composition that is restructuring of the existing objects. Is there a compiler that can compile a program written in a traditional procedural language (like C or Pascal) and generate a Java bytecode, rather than an executable code that runs oかy on the machine it was compiled (such as an a.out file on a Unix machine)\ulcorner This type of compiler may be very handy for today's computing environment of heterogeneous networks. In this paper we present a software system that does this job at the binary-to-binary level. It takes the compiled binary code of a procedural language and translates it into Java bytecode. To do this, we first translate into an assembler code called Jasmin [7] that is a human-readable representation of Java bytecode. Then the Jasmin assembler converts it into real Java bytecode. The system is not a compiler because it does not start at the source level. We believe this kind of translator is even more useful than a compiler because most of the executable code that is available for sharing does not come with source programs. Of course, it works only if the format of the executable binary code is known. This translation process consists of three major stages: (1) analysis stage that identifies the language constructs in the given binary code, (2) initialization stage where variables and objects are located, classified, and initialized, and (3) mapping stage that maps the given binary code into a Jasmin assembler code that is then converted to Java bytecode.

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Development of a Floating Point Co-Processor for ARM Processor (ARM 프로세서용 부동 소수점 보조 프로세서 개발)

  • 김태민;신명철;박인철
    • Proceedings of the IEEK Conference
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    • 1999.11a
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    • pp.232-235
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    • 1999
  • In this paper, we present a coprocessor that can operate with ARM microprocessors. The coprocessor supports IEEE 754 standard single- and double-precision binary floating point arithmetic operations. The design objective is to achieve minimum-area, low-power and acceleration of processing power of ARM microprocessors. The instruction set is compatible with ARM7500FE. The coprocessor is written in verilog HDL and synthesized by the SYNOPSYS Design Compiler. The gate count is 38,115 and critical path delay is 9.52ns.

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Design of Fanin-Constrained Multi-Level Logic Optimization System (Fanin 제약하의 다단 논리 최적화 시스템의 설계)

  • 임춘성;황선영
    • Journal of the Korean Institute of Telematics and Electronics A
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    • v.29A no.4
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    • pp.64-73
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    • 1992
  • This paper presents the design of multi-level logic optimization algorithm and the development of the SMILE system based on the algorithm. Considering the fanin constraints in algorithmic level, SMILE performs global and local optimization in a predefined sequence using heuristic information. Designed under the Sogang Silicon Compiler design environment, SMILE takes the SLIF netlist or Berkeley equation formats obtained from high-level synthesis process, and generates the optimized circuits in the same format. Experimental results show that SMILE produces the promising results for some circuits from MCNC benchmarks, comparable to the popularly used multi-level logic optimization system, MIS.

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Development of an Induction Motor Vector Control System Using Simulink/RTW (Simulink/RTW를 이용한 유도전동기 벡터제어시스템 개발)

  • 강문호
    • 제어로봇시스템학회:학술대회논문집
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    • 2000.10a
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    • pp.119-119
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    • 2000
  • In this research an induction motor vector control system was developed using Simulink and RTW(Real Time Workshop). On the Simulink window, control system is designed in the form of block diagrams, program codes are produced automatically with the RTW, then c compiler compiles the program codes. With this automatic real time program producing mechanism rapid prototyping is realized without the time-consuming manual program coding procedures. To show effectiveness of the proposed designing scheme a DSP-based induction motor vector control system was constructed and implemented

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Development of a G-machine Based Translator for a Lazy Functional Programming Language Miranda (지연함수언어 Miranda의 G-기계 기반 번역기 개발)

  • Lee, Jong-Hui;Choe, Gwan-Deok;Yun, Yeong-U;Gang, Byeong-Uk
    • The Transactions of the Korea Information Processing Society
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    • v.2 no.5
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    • pp.733-745
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    • 1995
  • This study is aimed at construction of a translator for a functional programming language. For this goal we define a functional programming language which has lazy semantics and develop a translator for it. The execution model selected is the G-machine-based combinator graph reduction. The translator is composed of 4 phases and translates a source program to a C program. The first phase of the translator translates a source program to a enriched lambda- calculus graph, the second phase transforms a lambda-calculus graph into supercombinators, the third phase translates supercombiantors to a G program and the last phase translates the G program to a C program. The final result of the translator, a C program, is compiled to an executable program by C compiler. The translator is implemented in C using compiler development tools such as TACC and Lex, under the UNIX environments. In this paper we present the design and implementation techniques for developing the translator and show results by executing some test problems.

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