• International Journal of Internet, Broadcasting and Communication
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• v.11 no.1
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• pp.69-74
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• 2019

The compiler is the key of the prototyping framework for the new memory system. These compiler-centric prototyping tools have several components, including compiler, linker, assembler, and standard libraries. It takes a lot of cost and man power to develop it all at zero base. Therefore, developer usually use a development framework to develop these prototyping tools efficiently. These development frameworks should be free of licensing issues when considering the commercialization of development results. Thus, developer should investigate the development framework, which is free from licensing issues and that provides all of the development environment to enable actual execution. There are three representative compiler-centric development frameworks: GCC, Clang (LLVM), and MS visual studio. There are some differences depending on the release version among them. And, there are some limitations to the freeware and commercial use. We chose LLVM here to explain the development of prototyping tools. This information will help accelerate the development of prototyping tools and will help reduce system development costs.

• The Journal of Korean Association of Computer Education
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• v.14 no.5
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• pp.9-18
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• 2011

Compiler development projects, which are designed and taught in compiler course, allow students to practice and absorb valuable amount of experience and techniques in developing compilers. However, both instructors and students face difficulties as they are often limited by insufficient hands-on time during course of an academic year along with a relatively high level of technologies involved when dealing with compilers. As well, most compiler's target systems use interpreter-based technologies which are rather limited in drawing student's attention. As a result compiler courses often end up being more of a theoretical course than practical. This paper presents a new integrated development environment (IDE) that will help overcome aforementioned difficulties and allow students to obtain both theoretical and practical knowledge more efficiently. The development environment includes a reference compiler with $Mindstorms^{(R)}$ NXT Robots as the target system, compiler development tool, target language test tool, and code generation visualizer. It is developed as a plug-in for the popular Eclipse IDE which enables easy access and great expandability. This integrated development environment allows students to understand compilers better and start their development faster.

• The Journal of Korean Association of Computer Education
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• v.16 no.6
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• pp.33-43
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• 2013

Compiler and language implementation courses have long been recognized as an important subject in Computer Science curricula. It is because not only the knowledge for a compiler plays important roles in understanding programming languages and systems but compiler technologies can be used in many applications. However it requires much effort to teach effectively it due to limited resources and time restriction. We present a compiler teaching model using Edu-IDEC which is a development environment of educational compilers. Edu-IDEC is a tool on the robot platform. It uses the Eclipse plug-ins and has functions like compiler developing tools, a reference compiler, visualization tool of syntax tree, visualization tool of object language, NXT robot controllers, and its simulator. We also present the evaluation results for our model by applying it to an actual class.

• Proceedings of the IEEK Conference
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• 2001.06b
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• pp.381-384
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• 2001

This paper describes the features and development of a RAM compiler that can generate low power, high speed, synchronous CMOS SRAM. The compiled SRAM can be configurable from 64bytes to 16Kbytes in one bank and has 2ns access time typically. Basic cells are developed using 2-poly, 4-metal 0.35um CMOS technology. This SRAM compiler is developed using SKIL $L^{TM}$ language and generates layout and schematic in Cadence environment.

• Journal of the Korea Society of Computer and Information
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• v.21 no.11
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• pp.159-166
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• 2016

Compiler course is one of the important courses in computer science. It requires more efficient learning environment because of its large coverage scale and complexity. One of its solutions is to provide the integrated development environment for educational compilers which is enable to give practice-oriented class and enhance student's interest. This paper presents the code generation support system developed in an integrated development environment of educational compiler. Our system helps students to understand the process of code generation and visualizes the relation among the source language, AST, and the target language. It makes students develop their own compilers more easily.

• Journal of the Korean Institute of Telematics and Electronics A
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• v.29A no.9
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• pp.76-84
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• 1992

The DSP silicon compiler consists of language compiler, module generator, placement tool, router, layout generation tools, and simulator. In this paper, The language compiler, the module generator, placement tool, and simulator were developed and provided for the system designer. The language compiler translates the designer's system description language into the intermediate form file. The intermediate form file expresses the interconnections and specifications of the cells in the cell library. The simulator was developed and provided for the behavioral verification of the DSP system. For its implementation, the event-driven technique and the C$^{++}$ task library was used. The module generator was developed for the layout of the verified DSP system, and generates the functional block to be used in the DSP chip. And then the placement tool determines the appropriate positions of the cells in the DSP chip. In this paper, the placement tool was implemented by Min-Cut and Simulated Annealing algorithm. The placement process can be controlled by the several conditions input by the system designer.

• The Journal of Korea Institute of Information, Electronics, and Communication Technology
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• v.15 no.3
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• pp.189-197
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• 2022

With the development of high-performance computing technology and the advancement of numerical model, it is possible to predict the better weather forecasting. The purpose of this paper is the performance improvement for the SCAM climate model for the model running time excluding the compilation time. Therefore, the model previously performed using the Intel Fortran Compiler was changed to PGI Fortran Compiler. To this end, we reconfigure system environment variables, reset compilation options, install dependencies SW and library, and modify source code. In addition, we proposed and applied the 'PGI Compile with OpenACC' method. As a result, when the compiler was changed from intel to PGI, it led to an improvement of 6.08% in running time and when the openACC method was applied, it led to an improvement of 43.05% in running time. This demonstrates that the PGI Compile with OpenACC method proposed in this paper leads to excellent performance.

• Proceedings of the Korea Information Processing Society Conference
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• 2014.11a
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• pp.53-56
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• 2014

Application specific instruction-set processor (ASIP) is a suitable design choice for system designers who seek both flexibility to handle various applications in the domain together with the performance. Successful development of an ASIP, however, requires a software development kit (SDK) to be provided along with the processor. Synopsys Processor Designer is an ASIP development tool, which takes as input a set of files written in a high-level architecture description language called LISA (Language for Instruction Set Architecture), and generates SDK as well as RTL. Recently, they have added support for the generation of LLVM compiler backend, though some manual work is required. In this paper, we introduce some details in porting LLVM compiler to a custom processor architecture in Synopsys Processor Designer.

• Electronics and Telecommunications Trends
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• v.36 no.2
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• pp.32-42
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• 2021

The rapid growth of deep-learning applications has invoked the R&D of artificial intelligence (AI) processors. A dedicated software framework such as a compiler and runtime APIs is required to achieve maximum processor performance. There are various compilers and frameworks for AI training and inference. In this study, we present the features and characteristics of AI compilers, training frameworks, and inference engines. In addition, we focus on the internals of compiler frameworks, which are based on either basic linear algebra subprograms or intermediate representation. For an in-depth insight, we present the compiler infrastructure, internal components, and operation flow of ETRI's "AI-Ware." The software framework's significant role is evidenced from the optimized neural processing unit code produced by the compiler after various optimization passes, such as scheduling, architecture-considering optimization, schedule selection, and power optimization. We conclude the study with thoughts about the future of state-of-the-art AI compilers.

• Proceedings of the KIEE Conference
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• 1988.07a
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• pp.644-646
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• 1988

This paper has been aimed to develop M68020 Software Development System on a host computer 3B20S for the TDX-2 fully electronic Switching system by transporting M68020 C Cross Compiler. M68020 C Cross Compiler source code which includes assembler, run-time library and optimizer has been analyzed for the installation on the host computer 3B20S system. Moreover, the linkage editor source file has been analyzed and installed on the3B20S to produce the executable file correctly. Through these procedures, the M68020 object codes could be obtained on the 3B20S computer for the multi-using purposes. It has also been confirmed that the M68020 Software Development System on the 3B20S works correctly.