• Title/Summary/Keyword: Compensation circuit

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Fabrication of the Wafer Level Packaged LED Integrated Temperature Sensor and Configuration of The Compensation System for The LED's Optical Properties (온도센서가 집적된 WLP LED의 제작과 이를 통한 광 특성 보상 시스템의 구현)

  • Kang, In-Ku;Kim, Jin-Kwan;Lee, Hee-Chul
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.49 no.7
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    • pp.1-9
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    • 2012
  • In this paper, resistance temperature detector (RTD) integrated into the LED package is proposed in order to solve the temperature dependence of LED's optical properties. To measure the package temperature in real time, the RTD type temperature sensor having excellent accuracy and linearity between temperature change and resistance change was adopted. A stable metallic film is required for long term reliability and stability of the RTD type temperature sensor. Therefore, deposition and annealing condition for the film were determined. Based on the determined condition, the RTD type temperature sensor with the sensitivity of about $1.560{\Omega}/^{\circ}C$ was fabricated inside the LED package. In order to configurate the LED package system keeping the constant brightness regardless of the temperature, additional conversion circuit and control circuit boards were fabricated and added to the fabricated LED package. The proposed system was designed to compensate the light intensity caused by temperature change using the variable duty rate of driving current. As a result, the duty rate of PWM signal which is the output signal of the configurated system was changed with the temperature change, and the duty rate was similarly varied with the target duty rate. Consequently, it was focused the fabricated RTD can be used for compensating the optical properties of LED and the LED package which exhibits constant brightness regardless of the temperature change.

Synchronization performance optimization using adaptive bandwidth filter and average power controller over DTV system (DTV시스템에서 평균 파워 조절기와 추정 옵셋 변화율에 따른 대역폭 조절 필터를 이용한 동기 성능 최적화)

  • Nam, Wan-Ju;Lee, Sung-Jun;Sohn, Sung-Hwan;Kim, Jae-Moung
    • Journal of the Institute of Electronics Engineers of Korea SP
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    • v.44 no.5
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    • pp.45-53
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    • 2007
  • To recover transmitted signal perfectly at DTV receiver, we have to acquire carrier frequency synchronization to compensate pilot signal which located in wrong position and rotated phase. Also, we need a symbol timing synchronization to compensate sampling timing error. Conventionally, to synchronize symbol timing, we use Gardner's scheme which used in multi-level signal. Gardner's scheme is well known for its sampling the timing error signal from every symbol and it makes easy to detect and keep timing sync in multi-path channel. In this paper, to discuss the problem when the received power level is out of range and we cannot get synchronization information. With this problem, we use 2 step procedures. First, we put a received signal power compensation block before Garder's timing error detector. Second, adaptive loop filter to get a fast synchronization information and averaging loop filter's output value to reduce the amount of jitter after synchronization in PLL(Phased Locked Loop) circuit which is used to get a carrier frequency synchronization and symbol timing synchronization. Using the averaging value, we can estimate offset. Based on offset changing ratio, we can adapt adaptive loop filter to carrier frequency and symbol timing synchronization circuit.

A Study on the Remote Control for Exit Sign Using High Efficiency LED (고효율 LED를 이용한 유도등의 원격제어에 관한 연구)

  • 백동현;홍석표
    • Fire Science and Engineering
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    • v.16 no.2
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    • pp.1-7
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    • 2002
  • In the normally, exit sign is always lighting on status by the connected to normal electrical source. So, there are happened to rise of the economical cost such as power consumption, maintenances and repair replacement of lamp etc. This paper are study on the new exit sign circuits by using high efficiency LED that is available for remote control and reduceible to power consumption, maintenance cost by the way of compensation fluorescent and incandescent lamps. As a results on the study, exit sign lamp is capable of control and supervisory in trigger angle by the remote control switch, widely and easily. And then, the response time was very fast in 600〔$\mu$s〕and also it can be find that the rising and fall time of oscillate circuit is maximum 200〔ns〕 as high sensitively. Finally, it obtain to the result that reducible of electrical power consumption and not required for replacement of lamp by using the high efficiency LED lighting source.

Numerical Analysis of Si-based Photovoltaic Modules with Different Interconnection Methods

  • Park, Chihong;Yoon, Nari;Min, Yong-Ki;Ko, Jae-Woo;Lim, Jong-Rok;Jang, Dong-Sik;Ahn, Jae-Hyun;Ahn, Hyungkeun
    • Transactions on Electrical and Electronic Materials
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    • v.15 no.2
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    • pp.103-111
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    • 2014
  • This paper investigates the output powers of PV modules by predicting three unknown parameters: reverse saturation current, and series and shunt resistances. A theoretical model using the non-uniform physical parameters of solar cells, including the temperature coefficients, voltage, current, series and shunt resistances, is proposed to obtain the I-V characteristics of PV modules. The solar irradiation effect is included in the model to improve the accuracy of the output power. Analytical and Newton methods are implemented in MATLAB to calculate a module output. Experimental data of the non-uniform solar cells for both serial and parallel connections are used to extend the implementation of the model based on the I-V equation of the equivalent circuit of the cells and to extend the application of the model to m by n modules configuration. Moreover, the theoretical model incorporates, for the first time, the variations of series and shunt resistances, reverse saturation current and irradiation for easy implementation in real power generation. Finally, this model can be useful in predicting the degradation of a PV system because of evaluating the variations of series and shunt resistances, which are critical in the reliability analysis of PV power generation.

Effects of Temperature and Humidity on NDIR CO2 Gas Sensor (비분산 적외선 이산화탄소 가스센서 특성의 온·습도 영향)

  • Kim, JinHo;Yi, SeungHwan
    • Journal of Sensor Science and Technology
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    • v.26 no.3
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    • pp.179-185
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    • 2017
  • This article describes the characteristics of nondispersive infrared carbon dioxide gas sensor according to the temperatures and humidifies. In this researches, a thermopile sensor that included application-specific integrated circuit (ASIC) was used and the White-cell structure was implemented as an optical waveguide. The developed sensor modules were installed in gas chamber and then the temperature of gas chamber has been increased from 283 K to 313 K with 10K temperature step. In order to analyze the effects of humidity levels, the relative humidity levels were changed from 30 to 80%R.H. with small humidifier. Then, the characteristics of sensor modules were acquired with the increment of carbon dioxide concentrations from 0 to 2,000 ppm. When the initial voltages of sensors were compared before and after humidifying the chamber at constant temperature, the decrements of the output voltages of sensors are like these: 9mV (reference infrared sensor), 41 mV (carbon dioxide sensor), 2 mV (temperature sensor). With the increment of ambient temperature, the averaged output voltage of carbon dioxide sensor was increased 19 mV, however, when the humidity level was increased, it was decreased 14mV. Based upon the experimental results, the humidity effect could be alleviated by the increment of temperature, so the effects of humidity and temperature could be only compensated by the ambient temperature itself. The estimated carbon dioxide concentrations showed 10% large errors below 200 ppm, however, the errors of the estimations of carbon dioxide concentrations were less than ${\pm}5%$ from 400 to 2,000 ppm.

Dynamic Analysis and Control Loop Design of ZVS-FB PWM DC/DC Converter (ZVS-FB PWM DC/DC 변환기의 동특성 해석 및 제어기 설계)

  • 이득기;윤길문;차영길;김흥근
    • The Transactions of the Korean Institute of Power Electronics
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    • v.3 no.3
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    • pp.231-239
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    • 1998
  • This paper presents the dynamic analysis and control loop design of a zero voltage switching full bridge (ZVS-FB) PWM DC/DC converter. The small-signal model is derived incorporating the effects of phase shift control and the utilization of transformer leakage inductance and power FET junction capacitance to achieve zero voltage resonant switching. These effects are modeled by introducing additional feedforward and feedback terms for duty cycle modulation. Based on the results of the small-signal analysis, the control loop is designed using a simple two-pole one-zero compensation circuit. To show the validity of the design procedures, the small signal analysis of the closed loop system is carried out and the potential of the zero voltage switching and the superiority of the dynamic characteristics are verified through the experiment with a 2 kW prototype converter.

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Compensating algorithm of the secondary voltage for CCVT considering the hysteresis of a iron core (철심의 히스테리시스 특성을 고려한 CCVT 2차 전압 보상방법)

  • Kang, Y.C.;Lee, B.E.;Zheng, T.Y.;Lee, J.H.;Kim, Y.H.;Park, J.M.;So, S.H.;Jang, S.I.
    • Proceedings of the KIEE Conference
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    • 2005.11b
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    • pp.261-263
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    • 2005
  • In the extra and ultra high voltage system, the coupling capacitor voltage transformer (CCVT) measures the primary voltage with a small scale of voltage transformer (VT). However, the CCVT generates errors caused by the hysteresis characteristics of iron core and by the ferroresonance, inevitably. This paper proposes a compensation algorithm for the secondary voltage of a CCVT considering the hysteresis characteristics of an iron core. The proposed algorithm calculates the seconda교 current of a VT by summing the current flowing the ferroresonance circuit and the burden current; it estimates the secondary voltage of a VT; then the core flux is calculated by integrating of the secondary voltage of a VT, then estimates the exciting current using ${\lambda}-i$ characteristic of the core. The method calculates a primary voltage of a VT considering the estimated primary current. Finally, the correct voltage is estimated by compensating the voltage across the inductor and capacitor. The performance of the proposed algorithm was tested in a 345kV transmission system. The test results show that the proposed method can improve the accuracy of the seconda교 voltage of a CCVT.

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A Study on Frequency Offset Compensation using 2-Phase Characteristic of Beacon Signal modulated by Satellite (위성 변조 비콘 신호의 2위상 특성을 이용한 주파수 오프셋 보상방법에 대한 연구)

  • Choi, Chul-Hee
    • The Journal of the Institute of Internet, Broadcasting and Communication
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    • v.18 no.1
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    • pp.97-103
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    • 2018
  • In satellite communication, modulated beacon signal is spreaded by gold sequence and the modulated beacon is transmitted via linear phase modulation. Due to the difference in characteristics of the satellite and the receiver on the ground, frequency offset (FO) occurs. An existing modulated beacon receiver is a method of synchronizing the frequency of a modulated beacon signal using FFT(Fast Fourier Transform), which not only increases the delay and complexity in terms of system implementation but also has a separate circuit for compensating the phase difference due to FO and phase offset from FFT points. In order to overcome this problem, this paper proposes and analyzes a scheme for compensating and demodulating the coarse FO and phase offset at one time using the 2-phase shaped characteristics of the modulated beacon signal. Also, through the simulation, the modulation index suitable for the proposed method is analyzed and the appropriate cumulative number is also analyzed.

Design of High Frequency Boosting Circuits Compensating for Hearing Loss (청력 보정을 위한 고주파 증폭 회로 설계)

  • Lee, Kwang;Jung, Young-Jin
    • Journal of the Institute of Electronics and Information Engineers
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    • v.54 no.3
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    • pp.138-144
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    • 2017
  • In this paper, we propose a high frequency boosting circuits compensating for age-related hearing loss. The frequency response of this hearing loss is quite similar to that of a low-pass filter of which the critical frequency get lower with age. Therefore the voltage gain of this compensation circuits increase proportionally to the frequency of signals when the frequency is higher than the critical frequency and the voltage is constant irrespective of the frequency of signals when the frequency is lower than the critical frequency. The proposed circuits consist of a differential circuit and a unity gain amplifier. Because the critical frequency of the proposed circuits is controlled simply in the shape of a volume control lever, the aged people can adjust the high frequency boosting level easily according to one's hearing loss level. The critical frequency is continuously controllable in the whole audible frequency band and the gain of this high frequency boosting circuits is above 80dB at 10kHz.

Multiple Orthogonal Subcarrier Modulation based High-Speed UHF RFID System for Multiple-/Dense-Interrogator Environments (다중/집중리더 환경에 적합한 다중 직교 부반송파 변조 기반 고속 UHF RFID 시스템)

  • Park, Hyung Chul
    • Journal of the Institute of Electronics and Information Engineers
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    • v.53 no.9
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    • pp.67-74
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    • 2016
  • This paper presents a novel multiple orthogonal subcarrier modulation based UHF band RFID communication system. In tag-to-reader communication, the demonstration system can deliver 1.6 Mbps through four subcarriers. To improve data rate while suppressing increase in circuit complexity, tag employs square-waves as the subcarriers and uses individual load modulators for each subcarrier. By using multiple orthogonal subcarrier based modulation, proposed communication system can be operated under existing UHF band RFID regulation. In reader, an OFDM demodulator is used. Since the tag backscatters the reader's CW carrier, carrier frequency offset compensation is not necessary in reader demodulator. Experimental results show that the demonstration system achieves a bit error rate of 10-5 at an Eb/N0 of 10.8 dB.