• Journal of information and communication convergence engineering
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• 제14권2호
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• pp.115-121
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• 2016

Currently there is a lack of literature on SPICE-level models of double-gate (DG) tunnel field-effect transistors (TFETs). A DG TFET compact model is presented in this work that is used to develop a SPICE model for DG TFETs implemented with Verilog-A language. The compact modeling approach presented in this work integrates several issues in previously published compact models including ambiguity about the use of tunneling parameters A_k and B_k, and the use of a universal equation for calculating the surface potential of DG TFETs in all regimes of operation to deliver a general SPICE modeling procedure for DG TFETs. The SPICE model of DG TFET captures the drain current-gate voltage (I_ds-V_gs) characteristics of DG TFET reasonably well and offers a definite computational advantage over TCAD. The general SPICE modeling procedure presented here could be used to develop SPICE models for any combination of structural parameters of DG TFETs.

• 한국항행학회논문지
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• 제17권5호
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• pp.475-483
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• 2013

본 논문에서는 Network RTK 보정정보를 사용자에 적용 시, 다중 기준국 보정정보 모델링 방식에 따른 사용자 성능 비교를 수행하였다. 기준국과 사용자 거리가 멀어질수록 사용자와 기준국의 GPS 오차요소 상관성이 감소하므로, 이와 같은 GPS 오차요소의 공간적 특성에 입각하여 다수의 네트워크 보정정보를 적절히 조합하여 사용자에 적용해주어야 한다. 기존에 기준국간 수평 거리 및 고도를 활용한 다양한 보정정보 모델링 방식을 활용하여, MAC 방식의 Compact Network RTK에 적용 가능한지 이론적으로 분석하였다. 한국 내 설치된 상시 기준국에서 습득한 실측 GPS 데이터를 활용하여, 서울대학교에서 제안한 Compact RTK와 기존의 Network RTK가 결합된 방식인 Compact Network RTK 사용자에 대해 각 모델링 방식 별 사용자 성능을 측정치 잔여오차 및 위치 정확도 예측치 관점에서 비교 및 분석을 수행하였다. 그 결과, 각 보정정보 모델링 방식에 대해 사용자 수평 위치 정확도 예측치의 경우 모두 2DRMS 5 cm 이내의 정확도를 보였고, 수직 위치 정확도 예측치의 경우 모두 95 % 신뢰도로 7 cm 이내의 정확도를 나타내었다. 또한, 기존 보정정보 모델 방식 중, 기준국간 고도 차이를 사용한 모델링 방법의 적용 가능 기준국 배치 조건에 대해 분석하였다.

• JSTS:Journal of Semiconductor Technology and Science
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• 제9권4호
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• pp.225-232
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• 2009

An analytical compact model for the asymmetric lightly doped Double Gate (DG) MOSFET is presented. The model is developed using the Lambert Function and a 2-dimensional (2-D) parabolic electrostatic potential approximation. Compact models of the net charge and channel current of the DG-MOSFET are derived in section 2. Results for the channel potential and current are compared with 2-D numerical data for a lightly doped DG MOSFET in section 3, showing very good agreement.

• International Journal of Automotive Technology
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• 제8권4호
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• pp.403-411
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• 2007

This article describes a methodology based on experiments and 1D modeling work related to the exhaust system analysis of a small two-stroke engine. The primary goal of this work was to understand how the design criteria of a compact exhaust system influenced the exhaust port pressure, since its evolution controls not only engine performance but also exhaust emissions. On the experimental side, a fully instrumented 50cc two-stroke engine was used to check the behavior of three different exhaust systems. A problem related to instantaneous pressure measurements in unsteady, hot flow was detected and solved during the study. To build the 1D model of the three exhaust systems, experimental information on the steady flow and the impulse test rigs was obtained under controlled conditions in specific facilities. Accurate comparisons between measured and calculated exhaust port instantaneous pressures were obtained from the following different exhaust system configurations: a straight duct, a tapered pipe and the three compact exhaust systems. The last step in the method used this model to analyze the pressure waves inside the exhaust system and detect the influence of the geometric parameters. The results should lead to improvements in the design process of complex compact exhaust systems in two-stroke engines.

• JSTS:Journal of Semiconductor Technology and Science
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• 제4권3호
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• pp.141-148
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• 2004

We discuss and develop a compact MOSFET modeling scheme in order to obtain accurate descriptions of the drain current and its derivatives up to the 5th order. We have analyzed the physical effects which govern the behaviour of the 3rd derivative in long and deep-subrnicron channel MOSFETs. Our modeling agrees well with experimental data and describes continuous transitions between operating regimes, thanks to the use of continuous functions, which do not introduce any artificial peaks.

• 한국CDE학회논문집
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• 제9권4호
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• pp.294-305
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• 2004

Highly detailed geometric models are rapidly becoming commonplace in computer graphics and other applications. These complex models, which is often represented as complex1 triangle meshes, mainly suffer from the vast memory requirement for real-time manipulation of arbitrary geometric shapes without loss of data. Various techniques have been devised to challenge these problems in views of geometric processing, not a representation scheme. This paper proposes the new mesh structure for the compact representation and the efficient handling of the highly complex models. To verify the compactness and the efficiency, the memory requirement of our representation is first investigated and compared with other existing representations. And then we analyze the time complexity of our data structure by the most critical operation, that is, the enumeration of the so-called one-ring neighborhood of a vertex. Finally, we evaluate some elementary modeling functions such as mesh smoothing, simplification, and subdivision, which is to demonstrate the effectiveness and robustness of our mesh structure in the context of the geometric modeling and processing.

• 한국콘텐츠학회:학술대회논문집
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• 한국콘텐츠학회 2010년도 춘계 종합학술대회 논문집
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• pp.390-392
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• 2010

Mobile grid system supports the integration mobile devices as grid resources. Availability of mobile resources changes dynamically in mobile grid system. Stochastic reward nets (SRN) is an extension of stochastic Petri nets and provides compact modeling facilities for system analysis. We build the SRN model to represent availability of mobile resources with disconnected operation service.

• 반도체디스플레이기술학회지
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• 제19권3호
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• pp.73-76
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• 2020

The physics-based compact gate leakage current noise models in nanoscale MOSFETs are developed in such a way that the models incorporate important physical effects and are suitable for circuit simulators, including QM (quantum-mechanical) effects. An emphasis on the trap-related parameters of noise models is laid to make the models adaptable to the variations in different process technologies and to make its parameters easily extractable from measured data. With the help of an accurate and generally applicable compact noise models, the compact noise models are successfully implemented into BSIM (Berkeley Short-channel IGFET Model) format. It is shown that the noise models have good agreement with measurements over the frequency, gate-source and drain-source bias ranges.

• The Journal of the Acoustical Society of Korea
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• 제25권1E호
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• pp.32-35
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• 2006

The screech tone of underexpanded jet is numerically calculated without any specific modeling for the screech tone itself. Fourth-order optimized compact scheme and fourth-order Runge-Kutta method are used to solve the 2D axisymmetric Euler equation. Adaptive nonlinear artificial dissipation model and generalized characteristic boundary condition are also used. The screech tone, generated by a closed loop between instability waves and quasi-periodic shock cells at the near field, is reasonably analyzed with present numerical methods for the underexpanded jet having Mach number 1.13. First of all, the centerline mean pressure distribution is calculated and compared with experimental and other numerical results. The instantaneous density contour plot shows Mach waves due to mixing layer convecting supersonically, which propagate downstream. The pressure signal and its Fourier transform at upstream and downstream shows the directivity pattern of screech tone very clearly. Most of all, we can simulate the axisymmetric mode change of screech tone very precisely with present method. It can be concluded that the basic phenomenon of screech tone including the frequency can be calculated by using high-order and high-resolution schemes without any specific numerical modeling for screech tone feedback loop.

• 연구논문집
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• 통권33호
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• pp.17-25
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• 2003

In this work, thermal design of a PCR chip for LOC is systematically conducted. From the numerical simulation of a PCR chip based on the finite volume method, how to control the average temperature of a PCR chip and the temperature difference between the denaturation zone and the annealing zone is presented. The average temperature is shown to be controlled by adjusting heat input and a cooler as well as a heater is shown to be necessary to obtain three individual temperature zones for polymerase chain reaction. To reduce the time required, a heat sink for the cooler is not included in the calculation domain for the PCR chip and heat sink design is conducted separately by using a compact modeling method, the porous medium approach.