• Proceedings of the KIEE Conference
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• 2011.07a
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• pp.1216-1217
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• 2011

본 논문에서는 제주 스마트그리드 실증단지 계통에 연계될 전류형 HVDC 상세 모델을 이용하여 계통에 외란이 발생할 경우에 일어날 수 있는 Commutation Failure를 고려한 HVDC 고장영향을 분석한 내용에 대해 기술하고 있다. 전류형 HVDC 시스템의 Commutation Failure 기본원리를 정리하고, 계통의 3상 지락고장을 가정하여 이론적인 전압감소 시점에 대해 설명하였고, 이를 통해 3상 지락고장시 리액턴스(계통 임피던스 + HVDC 부가설비 리액턴스) 값 변동에 따른 Commutation Failure 지속시간을 Multiple Transient Simulation 방법을 통해 확인하였다. 도출된 결과를 통해 리액턴스 값이 작을수록 Commutation Failure 진행 시간을 줄일 수 있음을 보여주였다.

• Journal of Electrical Engineering and Technology
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• v.13 no.3
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• pp.1052-1059
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• 2018

This paper deals with commutation failure of the line-commutated converter high voltage direct current (LCC HVDC) system caused by a three phase fault in the ac power system. An analytic calculation method is proposed to estimate the maximum permissible voltage drop at the LCC HVDC station on various operating point and to assess the area of vulnerability for commutation failure (AOV-CF) in the power system based on the residual phase voltage equation. The concept is extended to multi-infeed HVDC power system as the area of severity for simultaneous commutation failure (AOS-CF). In addition, this paper presents the implementation of a shunt compensator applying to the proposed method. An analysis and simulation have been performed with the IEEE 57 bus sample power system and the Jeju island power system in Korea.

• Journal of Electrical Engineering and Technology
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• v.13 no.4
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• pp.1450-1458
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• 2018

Commutation failures can deteriorate the availability of high-voltage direct current (HVDC) links and may lead to outage of the HVDC system. Most commutation failures are caused by voltage reduction due to ac system faults on inverter side. The commutation failure process can be divided into two stages. The first stage, from the occurrence to the clearing of faults, is called 'Deterioration Stage'. The second stage, from the faults clearing to restoring the power system stability, is called 'Recovery Stage'. Based on the analysis of the commutation failure process, this paper proposes a direct-current fuzzy controller including prevention and recovery controller. The prevention controller reduces the direct current to prevent Commutation failures in the 'Deterioration Stage' according to the variation of ac voltage. The recovery controller magnifies the direct current to speed up the recovery of power system in the 'Recovery Stage', based on the recovery of direct voltage. The validity of this proposed fuzzy controller is further proved by simulation with CIGRE HVDC benchmark model in PSCAD/EMTDC. The results show the commutation failures can be mitigated by the proposed direct-current fuzzy controller.

• Journal of Power Electronics
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• v.15 no.5
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• pp.1367-1379
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• 2015

A hybrid HVDC system that is composed of line commutated converter (LCC) at the rectifier side and voltage source converter (VSC) in series with LCC at the inverter side is studied in this paper. The start-up strategy, DC fault ride-through capability, and fault recovery strategy for the hybrid HVDC system are proposed. The steady state and dynamic performances under start-up, AC fault, and DC fault scenarios are analyzed based on a bipolar hybrid HVDC system. Furthermore, the immunity of the LCC inverter in hybrid HVDC to commutation failure is investigated. The simulation results in PSCAD/EMTDC show that the hybrid HVDC system exhibits favorable steady state and dynamic performances, in particular, low susceptibility to commutation failure, excellent DC fault ride-through, and fast fault recovery capability. Results also indicate that the hybrid HVDC system can be a good alternative for large-capacity power transmission over a long distance byoverhead line.

• The Transactions of the Korean Institute of Electrical Engineers B
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• v.50 no.10
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• pp.521-529
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• 2001

This paper deals with the commutation failures of HVCD system. Commutation failures are caused by AC voltage distrotions at inverter side and cause the HVDC system oscillations. In this paper, in order to know a correct incidence and onset of the failures, theoretical analysis, the simulation and the investigation at actual system are carried out and the dynamic performace simulations are performed by PSCAD/EMTDC. Finally, the condition that the failure could be generated and how to reduce the failures are analyzed.

• Proceedings of the KIEE Conference
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• 2000.07b
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• pp.1286-1288
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• 2000

Commutation failure can be considered as the severest abnormal operation of thyristor HVDC converter. During the failure, power conversion from DC to AC is stopped until the AC voltage get recovered. The process of thyristor converter is subscribed at normal and abnormal state, respectively. The detection and the protection for Cheju HVDC are explained by computer simulation results.

• 전기의세계
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• v.28 no.1
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• pp.67-72
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• 1979

The most difficult problem encountered in the DC Chopper is the improvement in it's output waveforms and the commutation failure. Thus, this paper deals with the Load Insensitive DC Chopper that produces a quasi-pure square wave over the entire load range, and doesn't fail the commutation. The authors compared voltage and current waveforms from the laboratory model with those from the computer simulation, and it's characteristics is discussed.

• Proceedings of the Korean Society for Noise and Vibration Engineering Conference
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• 2008.04a
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• pp.869-873
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• 2008

Optimization method for the open loop commutation time intervals in HDD spindle start-up control is presented in this paper. A hard disk drive(HDD) uses a sensorless brushless DC motor(BLDC) for the platter rotation. Because there is no direct sensor for the rotor position, open loop commutations after sensing the rotor position at a standstill using inductive sensing method are performed to speed up the rotor up to a certain speed where the zero crossings of the back electromotive force(EMF) are measurable. Therefore successful open loop commutations are necessary for the stable start-up control of the spindle motors. Random neighborhood search(RNS) algorithm is introduced as a optimization technic in this paper. Rotor speed and its standard deviation are used as a cost function and commutation intervals obtained from the spindle motion equation are used as initial parameter values for the RNS. With the help of the proposed method optimized open loop commutation time intervals for the very low start-up current are acquired and tested. The experimental results shows that the proposed method can decrease the start-up failure rate of a HDD spindle motor.

• The Transactions of the Korean Institute of Electrical Engineers
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• v.35 no.8
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• pp.353-362
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• 1986

This paper shows that 6 pulse converter instead of 12 pulse converter can be used for the control of Superconducting Magnet Energy Storage(SMES) to improve the stability and to suppress the voltage fluctuation of power system. In order to prevent the commutation failure, when 6 pulse converter used for simultaneous control of real power and reactive power is asymmetrically controlled, stable control region has been presented by analyzing the commutation phenomena at critical points which distinguish the stable control region from the unstrol control region. Harmonic components of line current and output voltage have been calculated. Finally, computer simulation of power system stabilization has been presented to show the effectiveness of the proposed method. According to the computation results, SMES controlled by the 6 pulse converter is an effective measure in reducing the oscillation and the transient instability of the power system.

• Journal of Advanced Marine Engineering and Technology
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• v.13 no.1
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• pp.57-68
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• 1989

This paper treats the analytical and experimental studies on the improvement of commutating circuit for the speed control of DC motor. A simple circuit composed of R, L and C elements is proposed here for switching off power SCR carrying the load current. The real important in this chopper circuit is to determine the reasonable values of commutating circuit constants. In this paper, the reasonable values of the commutating circuit constants are basically determined on a view point of commutating performances in the given circuit model and must satisfy the following conditions. The first, the peak commutating current should be larger than the anticipated maximum load current. The second, the circuit turn-off time (tc) must be longer than the SCR turn-off time (tq). The third, the resistor should be enough large to permit the current to be neglected in the analysis of the commutation circuit, as well as be enough small to permit to charge the capacity voltage (Ec) to the half the value of source voltage (E) before the next communication cycle is initiated. The last, the period of chopping signal must be the least possible multiple of the damping vibration period of commutating circuit. The improved chopper circuit used in the experiment under unloaded condition was composed to meet the reasonable conditions mentioned above, and a successful commuting performance was achieved without failure. Several types of microprocessor having a different value of CPU speed individually have been applied to the experiment under the loaded conditions. Also it shows that the faster the speed of CPU is, the more stable the commutation turns out.