• Journal of Power Electronics
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• v.19 no.4
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• pp.907-921
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• 2019

This paper presents two advanced hybrid pulse-width modulation (PWM) strategies for multilevel inverters (MLIs) that provide both common-mode voltage (CMV) elimination and current ripple reduction. The first PWM utilizes sequences that apply one switching state at the double ends of a half-carrier cycle. The second PWM combines the advantages of the former and an existing four-state PWM. Analyses of the harmonic characteristics of the two groups of switching sequences based on a general switching voltage model are carried out, and algorithms to optimize the current ripple are proposed. These methods are simple and can be implemented online for general n-level inverters. Using a three-level NPC inverter and a five-level CHB inverter, good performances in terms of the root mean square current ripple are obtained with the proposed PWM schemes as indicated through improved harmonic distortion factors when compared to existing schemes in almost the entire region of the modulation index. This also leads to a significant reduction in the current total harmonic distortion. Simulation and experimental results are provided to verify the effectiveness of the proposed PWM methods.

• The Transactions of the Korean Institute of Power Electronics
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• v.24 no.1
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• pp.56-61
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• 2019

In this study, a reduction method of leakage current in a three-level photovoltaic power-conditioning system (PCS) is proposed and verified by simulation and experiment. Leakage current generation is analyzed through an equivalent model of the common mode voltage considering a significant parasitic capacitance existing between the photovoltaic array and ground. A leakage current reduction method using pulse-width modulation (PWM) method is also proposed, and a 10-kW three-level photovoltaic PCS simulation and experiment is performed with a $1{\mu}F$ parasitic capacitor based on 100 nF/kW. The proposed method using the PWM method is verified to reduce the leakage current by 73% compared with the conventional PWM method.

• Journal of the Institute of Convergence Signal Processing
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• v.13 no.4
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• pp.201-206
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• 2012

The indirect-contact ECG measurement is a newly developed method for unconstrained and nonconscious measurement in daily life. This study introduced a new method of electrode circuit design developed for reducing the 60Hz power line noise observed at the indirect-contact ECG measurement. By the introduced common-mode-driven shielding, the voltage of the electrical shield surrounding the capacitive coupling electrode is maintained at the same as the common mode voltage. Though the method cannot reduce the level of common mode voltage itself, that reduces effectively the differential mode noise converted from the common mode voltage by the difference of cloth impedance between the two capacitive coupling electrode. The experiment results using the actual indirect-contact ECG showed that the 60Hz power line noise was reduced remarkably though the reduction ratio was smaller than the expected by the theory. Especially, the reduction ratio became large for the large difference of cloth. It is expected that the introduced method is useful for reducing the power line noise under condition of poor electrical grounding.

• Journal of Power Electronics
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• v.11 no.1
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• pp.21-27
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• 2011

In this paper, an approach to reduce common-mode voltage (CMV) at the output of multilevel inverters using a phase opposition disposed (POD) sinusoidal pulse width modulation (SPWM) technique is proposed. The SPWM technique does not require computations therefore, this technique is easy to implement on-line in digital controllers. A good tradeoff between the quality of the output voltage and the magnitude of the CMV is achieved in this paper. This paper realizes the implementation of a POD-SPWM technique to reduce CMV using a five-level diode clamped inverter for a three phase induction motor. Experimental and simulation results demonstrate the feasibility of the proposed technique.

• Journal of electromagnetic engineering and science
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• v.8 no.4
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• pp.153-157
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• 2008

Most of malfunctions in electronic equipment or systems controlled by processors is occurred by the differential- and common-mode noises, and the electrical fast transient (EFT). The International Electrotechnical Commission (IEC) has prepared the dummy signal to test the immunity level of the equipment. For the countermeasure against the differential- and common-mode noises, and the EFT, we designed, fabricated, and tested a new electromagnetic compatibility (EMC) filter, which is composed of feed-through capacitors and ferrite beads with high permeability. As a result, the filter showed excellent differential- and common-mode noises filtering, and immunity improving characteristics over the frequency band from 30 MHz to 1.5 GHz and 1.8 GHz, respectively.

• Journal of Power Electronics
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• v.19 no.6
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• pp.1477-1485
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• 2019

This paper proposes an effective model predictive current control (MPCC) that involves using 10 virtual voltage vectors to reduce the current harmonics and common-mode voltage (CMV) for a two-level five-phase voltage source inverter (VSI). In the proposed scheme, 10 virtual voltage vectors are included to reduce the CMV and low-order current harmonics. These virtual voltage vectors are employed as the input control set for the MPCC. Among the 10 virtual voltage vectors, two are applied throughout the whole sampling period to reduce current ripples. The two selected virtual voltage vectors are based on location information of the reference voltage vector, and their duration times are calculated using a simple algorithm. This significantly reduces the computational burden. Simulation and experimental results are provided to verify the effectiveness of the proposed scheme.

• Journal of Sensor Science and Technology
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• v.32 no.6
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• pp.432-440
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• 2023

This study introduces an efficient readout circuit designed for two-electrode electrocardiogram (ECG) recording, characterized by its low-noise and low-power consumption attributes. Unlike its three-electrode counterpart, the two-electrode ECG is susceptible to common-mode interference (CMI), causing signal distortion. To counter this, the proposed circuit integrates a common-mode charge pump (CMCP) with a window comparator, allowing for a CMI tolerance of up to 20 V_PP. The CMCP design prevents the activation of electrostatic discharge (ESD) diodes and becomes operational only when CMI surpasses the predetermined range set by the window comparator. This ensures power efficiency and minimizes intermodulation distortion (IMD) arising from switching noise. To maintain ECG signal accuracy, the circuit employs a chopper-stabilized instrumentation amplifier (IA) for low-noise attributes, and to achieve high input impedance, it incorporates a floating high-pass filter (HPF) and a current-feedback instrumentation amplifier (CFIA). This comprehensive design integrates various components, including a QRS peak detector and serial peripheral interface (SPI), into a single 0.18-㎛ CMOS chip occupying 0.54 mm². Experimental evaluations showed a 0.59 µV_RMS noise level within a 1-100 Hz bandwidth and a power draw of 23.83 µW at 1.8 V.

• Journal of Electrical Engineering and Technology
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• v.11 no.2
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• pp.393-404
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• 2016

In this paper, a carrier-based pulse with modulation (PWM) strategy for three-phase three-level inverter is dealt with, which can keep the common mode voltage constant with minimized switching frequency. The voltage gain and the switching frequency in overall operating ranges including overmodulation are investigated and the analytic equations are presented. Finally, the leakage current reduction effect is confirmed by carrying out simulation and experiment. It will be pointed out that the leakage current cannot be perfectly eliminated because of the dead time.

• The Transactions of the Korean Institute of Power Electronics
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• v.20 no.6
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• pp.509-516
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• 2015

The overmodulation characteristics of a carrier-based medium vector pulse width modulation (CBMVPWM) are examined in this study. CBMVPWM can completely eliminate leakage currents in a three-phase, three-level inverter using only the switching states with the same common mode voltage even in an overmodulation operation. The analytic equations for the magnitude of the output voltage and the switching frequency are derived for overmodulation operation, and the effect of dead time on the leakage current is demonstrated. This study presents the operating principle of CBMVPWM, basic overmodulation features, and simulations and experiments for operating verification.

• The Transactions of the Korean Institute of Power Electronics
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• v.28 no.1
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• pp.1-7
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• 2023

A grid-connected 3-level NPC inverter is a power conversion device that connects renewable energy generators, such as photovoltaic or wind turbines to the grid. Although many studies have focused on this inverter, commercializing it requires strictly satisfying various safety and power quality-related standards. Among many standards, leakage current and grid current total harmonic distortion(THD) can be affected by external factors such as installation environment, aging, and grid conditions. Hence, inverter operations that can satisfy these standards need to be explored. In this study a 3-level NPC inverter operation algorithm using the Phase Opposition Disposition-PWM method that can effectively reduce leakage current and switching frequency adjustment to reduce THD effectively has been proposed.