• JSTS:Journal of Semiconductor Technology and Science
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• 제13권2호
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• pp.152-156
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• 2013

This paper presents a fast-lock dual-loop successive approximation register-controlled duty-cycle corrector (SARDCC) circuit using a mixed (binary+sequential) search algorithm. A wider duty-cycle correction range, higher operating frequency, and higher duty-cycle correction accuracy have been achieved by utilizing the dual-loop architecture and the binary search SAR that achieves the fast duty-cycle correcting property. By transforming the binary search SAR into a sequential search counter after the first DCC lock-in, the proposed dual-loop SARDCC keeps the closed-loop characteristic and tracks variations in process, voltage, and temperature (PVT). The measured duty cycle error is less than ${\pm}0.86%$ for a wide input duty-cycle range of 15-85 % over a wide frequency range of 0.5-2.0 GHz. The proposed dual-loop SARDCC is fabricated in a 0.18-${\mu}m$, 1.8-V CMOS process and occupies an active area of $0.075mm^2$.

• 한국컴퓨터정보학회:학술대회논문집
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• 한국컴퓨터정보학회 2016년도 제53차 동계학술대회논문집 24권1호
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• pp.289-290
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• 2016

본 논문에서는 CCTV 통합 관제 및 운영에 대해서 살펴보았다. 특히 기관의 무 중단 서비스를 제공하고 효율적인 서비스를 제공하기 위해서는 다양한 장비와 시스템을 정기, 수시, 특별 점검 등으로 분류하여 유지 관리하여 무 중단 서비스를 제공한다. 또한 각종 장애 발생 데이터를 잘 관리하고, 장애 빈도가 높은 현황들에 대해서는 사전에 체크리스트와 장애 발생 요인을 원천적으로 방지 할 수 있도록 사전 점검 및 유지 관리 포인트로 집중하여 운영 및 장애가 발생하지 않도록 한다. 특히 장마철인 7월, 8월, 9월에는 어느 계절보다 집중적으로 운영에 만전을 기한다. 따라서 항상 체크하여 서비스 중단에 대처하여 원활한 서비스를 제공함으로써 보다 편리한 지방자치 단체의 서비스가 되도록 한다.

• Journal of electromagnetic engineering and science
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• 제16권2호
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• pp.106-111
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• 2016

A resistive and capacitive (RC) microwave absorber with a layer thickness less than a quarter of a wavelength is investigated based on closed-form design equations, which are derived from the equivalent circuit of the RC absorber. The RC absorber is shown to have a theoretical 90% absorption bandwidth of 93% when the electrical layer thickness is $57^{\circ}$ (about ${\lambda}_0/6$). The trade-offs between the layer thickness and the absorption bandwidth are also elucidated. The presented formulation is validated by a design example at 3 GHz. The RC absorber is realized using a silver nanowire resistive rectangular structure with surrounding gaps. The measured 90% absorption bandwidth with a layer thickness of ${\lambda}_0/8$ is 76% from 2.3 GHz to 5.1 GHz in accordance with the theory and EM simulations. The presented design methodology is scalable to other frequencies.

• Journal of Electrical Engineering and Technology
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• 제13권1호
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• pp.362-371
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• 2018

This work proposes FPGA implementation of Carrier Disposition PWM for closed loop seven level diode clamped multilevel inverter in speed control of induction motor. VLSI architecture for carrier Disposition have been introduced through which PWM signals are fed to the neutral point seven level diode clamped multilevel using which the speed of the induction motor is controlled. This proposed VLSI architecture makes the power circuit to work better with reduced stresses across the switches and a very low voltage and current total harmonic distortion (THD). The output voltages, currents, torque & speed characteristics for seven level neutral point diode clamped multilevel inverter for AC drive was studied. It has observed the proposed scheme introduces less distortion and harmonics. The results were validated using real time results.

• Journal of Power Electronics
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• 제4권2호
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• pp.65-76
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• 2004

In this paper, the steady-state analysis of the three-phase self-excited induction generator (SEIG) driven by a variable-speed prime mover (VSPM) such as a wind turbine is presented. The steady-state torque-speed characteristics of the VSPM are considered with the three-phase SEIG equivalent circuit for evaluating the operating performances due to the inductive load variations. Furthermore, a PI closed-loop feedback voltage regulation scheme based on the static VAR compensator (SVC) for the three-phase SEIG driven by the VSPM is designed and considered for the wind power generation conditioner. The simulation and experimental results prove the practical effectiveness of the additional SVC with the PI controller-based feedback loop in terms of fast response and high performances.

• 대한전기학회논문지
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• 제38권11호
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• pp.877-887
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• 1989

In this paper, we attempt to achieve high dynamic performance by means of decoupled control of rotor speed and flux. Recently developed nonlinear feedback control theories are utilized. The rotor fluxes are estimated based on the rotor circuit equations. When the estimation error of the rotor flux tends to zero, the rotor speed and flux dynamic characteristics of the induction motor with our controller become linear. To minimize the deterioration of control performance, we use an identification algorithm for the rotor resistance. We analyze the dynamic behavior of the closed loop system with our controller. Both simulation and experimental results are included to demonstrate the practical significance of our result. In particular, our experimental results show that recently developed nonlinear feedback control techniques are of practical use in control of induction motors.

• 대한전기학회논문지:전기기기및에너지변환시스템부문B
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• 제51권9호
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• pp.499-508
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• 2002

This paper presents a finite element analysis of the electromechanical field in the spindle motor of a computer hard disk drive considering the speed control and mechanical flexibility. The driving circuit equation is modified by considering the switching action of PWM inverter, and is coupled with the Maxwell equation to obtain the nonlinear time-stepping finite element equation for the analysis of magnetic field. Magnetic force and torque are calculated by the Maxwell stress tensor. Mechanical motion of a rotor is determined by a time-stopping finite element method considering the flexibility of shaft, rotor and bearing. Both magnetic and mechanical finite element equations are combined in the closed loop to control the speed using PWM. Simulation results are verified by the experiments, and they are in food agreement with the experimental results.

• Journal of Power Electronics
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• 제14권4호
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• pp.796-805
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• 2014

A digital controller with a low-power approach for point-of-load synchronous buck converters is discussed and compared with its analog counterpart to confirm its feasibility for system integration. The tri-mode digital controller IC in $0.35{\mu}m$ CMOS process is presented to demonstrate solutions that include a PID, quarter PID, and robust RST compensators. These compensators address the steady-state, stand-by, and transient modes according to the system operating point. An idle-tone free condition for ${\Sigma}-{\Delta}$ DPWM reduces the inherent tone noise under DC-excitation. Compared with that of the traditional approach, this condition generates a quasi-pure modulation signal. Experimental results verify the closed-loop performances and confirm the power-saving mechanism of the proposed controller.

• Journal of Electrical Engineering and Technology
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• 제9권5호
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• pp.1551-1561
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• 2014

Design, Simulation and experimental analysis of closed loop time domain based Discrete PWM buck-boost converter are described. To improve the transient response and dynamic stability of the proposed converter, Discrete PID controller is the most preferable one. Discrete controller does not require any precise analytical model of the system to be controlled. The control system of the converter is designed using digital PWM technique. The proposed controller improves the dynamic performance of the buck-boost converter by achieving a robust output voltage against load disturbances, input voltage variations and changes in circuit components. The converter is designed through simulation using MATLAB/Simulink and performance parameters are also measured. The discrete controller is implemented, and design goal is achieved and the same is verified against theoretical calculation using LabVIEW.

• Journal of Electrical Engineering and Technology
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• 제8권4호
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• pp.787-798
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• 2013

This paper proposes a special power circuit topology and its corresponding control strategy for an energy recovery power accumulator battery pack testing system (PABPTS), which is particularly used in electric vehicles. Firstly, operation principle and related parameter design for the system are illustrated. Secondly, control strategy of the composite power converter for PABPTS is analyzed in detail. The improved scheme includes a high accuracy charge and discharge current closed loop. active power reference for the grid-side inverter is provided by the result of multiplication between battery pack terminal voltage and test current. Simulation and experimental results demonstrate that the proposed scheme could not only satisfy the requirements for PABPTS with wide-range current test, but also could recover the discharging energy to the power grid with high efficiency.