• The Transactions of The Korean Institute of Electrical Engineers
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• v.63 no.11
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• pp.1491-1496
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• 2014

VSC-HVDC system is vulnerable to a DC fault because the fault current can be injected from AC system to DC system during the fault. Therefore, DC circuit breaker is required to isolate faults in VSC-HVDC system. The inverse current injection method of circuit breaker has been considered as DC circuit breaker. However, the topology has drawback that the breaking time is longer than hybrid circuit breaker using semiconductor devices. In order to solve this problem, this paper proposes an improved topology of circuit breaker based on inverse current injection method. In addition, the proposed topology will be compared with the existing topology. And we will verify its effects by using the simulation results.

• 한국정보통신설비학회:학술대회논문집
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• 2006.08a
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• pp.170-174
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• 2006

In this paper electromagnetic topology (EMT) is used to analyze the lumped components on printed circuit boards (PCBs). It is difficult to obtain desirable results about the electromagnetic coupling problems by using a numerical or an experimental method on complex systems. The EMT can be considered as a helpful method to the analysis of electromagnetic interference / electromagnetic compatibility (EMI/EMC) problems in the complex system. To verify the validity of this method, three types of the PCBs mounting a simple circuit are fabricated and experimented.

• The Transactions of the Korean Institute of Power Electronics
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• v.24 no.3
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• pp.161-168
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• 2019

This study introduces a new topology to decrease the voltage stress experienced by a 13.56 MHz electrical variable capacitor (EVC) circuit with an asymmetrical switch structure applied to the impedance matching circuit of a radio frequency (RF) plasma system. The method adopts a symmetrical switch structure instead of an asymmetrical one in each of the capacitor's leg in the EVC circuit. The proposed topology successfully reduces voltage stress in the EVC circuit due to the symmetrical charging and discharging mode. This topology can also be applied to the impedance matching circuit of a high-power and high-frequency RF etching system. The target features of the proposed circuit topology are investigated via simulation and experiment. Voltage stress on the switch of the EVC circuit is successfully reduced by more than 40%.

• Journal of the Korea Society of Computer and Information
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• v.1 no.1
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• pp.25-36
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• 1996

We have analyzed the reliability of failure models In grid topology circuit switched networks. These models are grid topology circuit_ switched networks. and each node transmits packets to object node using flooding search routing method. We hypothesized that the failure of each link Is Independent. We have analyzed for the performance estimation of failure models It using joint probability method to the reliability of a small grid topology circuit switched network. and compared analytic output with simulated output. Also. We have evaluated the reliability of networks using call blocking Probability occurred in circuit switched networks.

• Proceedings of the KIEE Conference
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• 2000.07a
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• pp.125-127
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• 2000

Multiple faults are hard to diagnose correctly because the operation of circuit breakers tripped by former fault changes the topology of power systems. The information including operating time of actuated relays and tripped circuit breakers is used for considering changes of the network topology in fault section diagnosis. This paper presents a method for fault section diagnosis using a set of matrices which represent changes of the network topology due to operation of circuit breakers. The proposed method uses fuzzy relation to cope with the unavoidable uncertainties imposed on fault section diagnosis of power systems. The inference executed by the proposed matrices provides the fault section candidates in the form of a matrix made up of the degree of membership. Experimental studies for real power systems reveal usefulness of the proposed technique to diagnose multiple faults.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.15 no.4
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• pp.897-904
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• 2011

In this paper, a novel circuit topology of a low-noise amplifier tunable at 1.8GHz band for PCS and 2.4GHz band for WLAN using a CMOS active inductor is proposed. This circuit topology to reduce higher noise figure of the low noise amplifier with the CMOS active load is analyzed. Furthermore, the noise canceling technique is adopted to reduce more the noise figure. The noise figure of the proposed circuit topology is analyzed and simulated in $0.18{\mu}m$ CMOS process technology. Thus, the simulation results exhibit that the noise performance enhancement of the tunable low noise amplifier is about 3.4dB, which is mainly due to the proposed new circuit topology.

• The Transactions of the Korean Institute of Power Electronics
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• v.22 no.6
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• pp.469-475
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• 2017

Using impedance matching techniques as a way to increase system power transferability in capacitive wireless power transmission has been widely investigated in conventional studies. However, these techniques tend to increase the circuit volume and thus counterbalance the advantage of the simplicity in the energy link structure. In this paper, a compact circuit topology with one leakage-enhanced transformer is proposed in order to minimize the circuit volume for the capacitive power transfer system. This topology achieves a reactive compensation, and the system quality factor value can be reduced by the turn ratio. As a result, this topology not only reduces the overall system volume but also minimizes the voltage stress of the link capacitor. An optimal design guideline for the leakage-enhanced transformer is also presented. The advantages of the proposed scheme over the conventional method in terms of power efficiency and circuit volume are revealed through an analytic comparison. The feasibility of applying the new topology is also verified by conducting 50 W hardware tests.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.28 no.9
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• pp.73-82
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• 2014

This research proposes a new type of flyback converter topology based on magnetic circuit sharing. The proposed flyback topology uses a transformer involving shared magnetic flux, and its characteristic is magnetic flux cancelation by cross magnetic flux in the magnetic flux-sharing part of the core. The new topology aims to reduce the volume of transformer by reducing the cross section of the core. Compared to conventional converters using only 1 transformer, its circuit configuration involving the serial input and parallel output of 2 flyback coils allowed increased converter insulation strength. In addition, the adoption of interleaved switching method achieved the improvement of output voltage ripple, while magnetic circuit sharing reduced by 50% the cross section of core where magnetic circuit was shared.

• Journal of Power Electronics
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• v.17 no.1
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• pp.242-252
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• 2017

This paper deals with the blocking of DC-fault current during DC cable short-circuit conditions in HVDC (High-Voltage DC) transmission systems utilizing Modular Multilevel Converters (MMCs), where a new SubModule (SM) topology circuit for the MMC is proposed. In this SM circuit, an additional Insulated-Gate Bipolar Translator (IGBT) is required to be connected at the output terminal of a conventional SM with a half-bridge structure, hereafter referred to as HBSM, where the anti-parallel diodes of additional IGBTs are used to block current from the grid to the DC-link side. Compared with the existing MMCs based on full-bridge (FB) SMs, the hybrid topologies of HBSM and FBSM, and the clamp-double SMs, the proposed topology offers a lower cost and lower power loss while the fault current blocking capability in the DC short-circuit conditions is still provided. The effectiveness of the proposed topology has been validated by simulation results obtained from a 300-kV 300-MW HVDC transmission system and experimental results from a down-scaled HVDC system in the laboratory.

• Journal of the Korean Society of Industry Convergence
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• v.26 no.5
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• pp.953-965
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• 2023

The stratospheric drones are developed to perform missions such as weather observation, communication relay, surveillance, and reconnaissance at 18km to 20km, where climate change is minimal and there is no worry about a collision with aircraft. It uses solar panels for daytime flights and energy stored in batteries for night flights, providing many advantages over existing satellites. The electrical and power systems essential for stratospheric drone flight must ensure reliability, efficiency, and lightness by selecting the optimal circuit topology. Therefore, it is necessary to analyze the circuit topology of various types of multi-level inverters with high redundancy that can ensure the reliability and efficiency of the motor driving power required for stable long-term flight of stratospheric drones. By quantifying the switch element voltage drop and the number and weight of inverter components for each topology, we evaluate efficiency and lightness and propose the most suitable circuit topology for stratospheric drones.