• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.22 no.12
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• pp.36-46
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• 2008

This paper is to study on the Construction of Test circuit and Unification of Experiment Method for high voltage gas-insulated load switch using high power testing system The high power testing system is a equipment to verify electrical and mechanical performance on electrical product. The system consist of short-circuit generator, back-up breaker, making switch, impedance, high voltage transformer, low voltage transformer, measuring and protection system, etc. Using this system, we can test related to high power, for example, short-time current test, active load Current test, magnetizing Current test, capacitive current test, closed loop current test, etc. Standards of high voltage gas-insulated load switch that is in use domestic distribution line are ES 5925-0002, IEC 60265-1, IEC 62271-1 and IEEE C 37.74, etc. In this paper, we standardized on the test procedure, organization of test circuit and analysis of measured data prescribed many difference standards, and applied this test method to 600[MVA] high power testing system. So that we can test the load switch satisfied standards.

• The Transactions of the Korea Information Processing Society
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• v.4 no.7
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• pp.1900-1906
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• 1997

In this paper, the efficient BILBO(named EBILBO) is designed for BIST that is able to batch the testing when circuit is designed on FPGA. The proposed algorithm of batch testing is able to test the normal operation speed with one-pin-count that can control all part of large and complex circuit. PRTPG is used for the test pattern and MISR is used for PSA. The proposed algorithm of batch testing is VHDL coding on behavioral description, so it is easily modified the model of test pattern generation, signature analysis and compression. The EBILBO's area and the performance of designed BIST are evaluated with ISCAS89 benchmark circuit on FPGA. In circuit with above 600 cells, it is shown that area is reduced below 30%, test pattern is flexibly generated about 500K and the fault coverage is from 88.3% to 100%. EBILBO for the proposed batch testing BIST is able to execute concurrently normal and test mode operation in real time to the number of $s+n+(2^s/2^p-1)$ clock(where, in CUT, # of PI;n, # of register, p is order # of polynomial). The proposed algorithm coded with VHDL is made of library, then it well be widely applied to DFT that satisfy the design and test field on sme time.

• International Journal of Air-Conditioning and Refrigeration
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• v.12 no.4
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• pp.184-191
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• 2004

In order to improve the performance of a 2 room heat pump with a constant speed compressor, the optimum refrigeration circuit of the heat pump with different cooling and heating capacities is developed by applying capillary tubes. The refrigeration circuit is composed of four parts; a heating circuit, a cooling circuit, a by-pass circuit and a balance circuit. The performance of the 2 room heat pump are investigated from a rating experiment and a reliability experiment, using the calorimeter. Results of the rating experiment show that the capacity of heat pump is about $93\%$ of the design value. In particular, the capacity of the cooling single operation is about $13\%$ higher than the design value, and the capacity of the heating multi operation is about $5\%$ higher than the design value. From the reliability experi-ment, it is found that the lowest driving voltage of the compressor is about $75\%$ of the rating voltage. Also the compressor is reoperated normally under the flood back and the over load.

• Journal of the Korean Institute of Telematics and Electronics B
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• v.30B no.5
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• pp.82-89
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• 1993

In this paper, we proposed the autonomous algorithm of pseudo-exhaustive testing for the multi-level combinational logic circuits. For the processing of shared-circuit that existed in each cone-circuit when it backtracked the path from PO to PI of CUT at the conventional verification testing, the dependent relation of PI-P0 is presented by a dependence matrix so it easily partitioned the sub-circuits for the pseudo-exhaustive testing. The test pattern of sub-circuit's C-inputs is generated using a binary counter and the test pattern of I-inputs is synthesized using a singular cover and consistency operation. Thus, according to the test patterns presented with the recipe cube, the number of test pattrens are reduced and it is possible to test concurrently each other subcircuits. The proposed algorithm treated CUT's net-list to the source file and was batch processed from the sub-circuit partitioning to the test pattern generation. It is shown that the range of reduced ration of generated pseudo-exhaustive test pattern exhibits from 85.4% to 95.8% when the average PI-dependency of ISACS bench mark circuits is 69.4%.

• Proceedings of the KIEE Conference
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• 2001.07a
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• pp.476-478
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• 2001

Coordination under short-circuit conditions is a systematic application of protective devices in the electrical power system, which, in response to a fault, will remove only a minimum amount of equipment from service. The objective is not only to minimize the equipment damage and process outage costs, but also to protect personnel from the effects of these failures. The coordination study of an electric power system consists of an organizes time-current study of all devices in series from the utilization device to the source. This study is a comparison of the time it takes the individual devices to operate when certain levels of normal or abnormal current pass through the protective devices. The objective of a coordination study is to determine the characteristics, ratings, and settings of overcurrent protective devices that will ensure that the minimum unfaulted load is interrupted when the protective devices isolate a fault or overload anywhere in the system. At the same time, the devices and settings selected should provide satisfactory protection against overloads on the equipment and interrupt short-circuit as rapidly as possible.

• Journal of information and communication convergence engineering
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• v.11 no.1
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• pp.56-61
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• 2013

Modern integrated circuits (ICs) are becoming an integrated parts of analog, digital, and radio frequency (RF) circuits. Testing these RF circuits on a chip is an important task, not only for fabrication quality control but also for tuning RF circuit elements to fit multi-standard wireless systems. In this paper, RF test circuits suitable for embedded testing are introduced: RF power detectors, power control circuits, directional couplers, and six-port reflectometers. Various types of embedded RF power detectors are reviewed. The conventional approach and our approach for the RF power control circuits are compared. Also, embedded tunable active directional couplers are presented. Then, six-port reflectometers for embedded RF testing are introduced including a 77-GHz six-port reflectometer circuit in a 130 nm process. This circuit demonstrates successful calibrated reflection coefficient simulation results for 37 well distributed samples in a Smith chart. The details including the theory, calibration, circuit design techniques, and simulations of the 77-GHz six-port reflectometer are presented in this paper.

• KIEE International Transactions on Electrophysics and Applications
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• v.5C no.4
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• pp.145-151
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• 2005

The synthetic breaking test method was developed to evaluate the breaking performance of ultra high-voltage circuit breaker and made up of two independent circuits; current source circuit and voltage source circuit. In application of this test method, it is necessary to extend the arc of the test breaker. So, the new re-ignition system using VTGS (Vacuum Triggered Gap-Switch) was constructed to improve the efficiency and reliability of this test. In this re-ignition system, VTGS operates in high vacuum state of $5{\time}10^{17}$torr and control system consists of the triggering device and the air M-G (Motor-Generator). This re-ignition system showed the operating characteristics, such as delay time ($t_d$) and jitter time ($t_j$ not exceeding 5us and 1us respectively, and had the operating voltage of $25\~150kVdc$ at the gap distance of 24mm.

• Journal of Electrical Engineering and Technology
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• v.11 no.4
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• pp.839-847
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• 2016

Energy recovery battery testing systems (ERBTS) have been widely used in battery manufactures. All the ERBTS are connected in parallel which forms a special and complicated micro-grid system, which has the shortcomings of low energy recovery efficiency, complex grid-connected control algorithms issues for islanded detection, and complicated power circuit topology issues. To solve those shortcomings, a DC micro-grid system is proposed, the released testing energy has the priority to be reutilized between various testing system within the local grid, Compared to conventional scheme, the proposed system has the merits of a simplified power circuit topology, no needs for synchronous control, and much higher testing efficiency. The testing energy can be cycle-used inside the local micro-grid. The additional energy can be recovered to AC-grid. Numerous experimental comparison results between conventional and proposed scheme are provided to demonstrate the validity and effectiveness of the proposed technique.

• Proceedings of the KIEE Conference
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• 2001.07c
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• pp.1783-1785
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• 2001

With the 4-MJ synthetic testing facilities completed, KERI can perform the circuit breaker testing up to 420 kV, 50 kA ratings. The short-line fault test is one of the necessary test items which are required for the circuit breaker, and in order to perform the short-line fault test KERI(Korea Electrotechnology Institute) has used the "new artificial line" which has small dimension and is easy to generate the saw-tooth wave. This paper describes the following items of the new artificial line. -Description of 4-kinds of artificial lines and determination of the circuit parameter of artificial line. -TRV characteristics of saw-tooth waves for each circuit. -KERI's artificial line.

• Proceedings of the KIEE Conference
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• 2002.11d
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• pp.154-156
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• 2002

본 논문은 저압 차단기에 적용되는 IEC 60947-2 (Circuit breakers)와 전류고조파(Current harmonic) 내성시험 규격인 IEC 61000-3-2. IEC 61000-3-4에 대한 규격의 적용범위, 시험범위, 고조파에 대한 개념, 차단기의 고조파에 대한 영향 및 시험설비의 요구조건을 고찰하고, 16A 초과 전류 고조파 시험적용 방법과 시험결과를 고찰하고자 한다.