• Transactions of the Korean Society of Mechanical Engineers A
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• v.35 no.7
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• pp.723-728
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• 2011

Since the performance of a vacuum circuit breaker (VCB) mainly depends on the spring operating mechanism, an analysis of the spring operating mechanism is required in order to improve the design of a VCB. In this study, the static stiffness of the spring was determined by using a material testing machine, and the test results were used to model the spring through computer simulation. The multi-body dynamic model of the spring was established by using the RecurDyn program. The dynamic model was verified by comparing the results of stem displacements and rotating angles of the brake shaft obtained from the simulation and from the experiments. After verification of the dynamic model of VCB, the cam profile of the VCB was optimized through multi-body dynamics simulation in order to improve the performance of the closing mechanism.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.38 no.1
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• pp.44-54
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• 2001

In this paper, a novel test method is proposed to detect the hard and soft fault in analog circuits. The proposed test method makes use of the offset voltage, which is one of the op-amps characteristics. During the test mode, CUT is modified to unit gain op-amps with feedback loop. When the input of the op-amp is grounded, a good circuit has a small offset voltage, but a faulty circuit has a large offset voltage. Faults in the op-amp which cause the offset voltage exceeding predefined range of tolerance can be detected. In the proposed method, no test vector is required to be applied. Therefore the test vector generation problem is eliminated and the test time and cost is reduced. In this note, the validity of the proposed test method has been verified through the example of the dual slope A/D converter. The HSPICE simulations results affirm that the presented method assures a high fault coverage.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.46 no.9
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• pp.68-73
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• 2009

This paper presents an easily modifiable structure of a serial peripheral interface (SPI) that is suitable for efficient testing of CMOS RF integrated circuits. The proposed SPI Is designed so that the address size and the accompanying software can be easily adjusted and modified according to the requirements and complexity of RF IC's under development. The hardware architecture and software algorithm to achieve the flexibility are described. The proposed SPI is fabricated in $0.13{\mu}m$ CMOS and successfully verified experimentally with a 2.7GHz fractional-N delta-sigma frequency synthesizer as a device under test.

• Journal of the Korean Society for Nondestructive Testing
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• v.27 no.1
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• pp.1-7
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• 2007

As fiber reinforced composite materials are widely used in aircraft, space structures and robot arms, the study on non-destructive testing methods has become an important research area for improving their reliability and safety. AE (acoustic emission) can evaluate the defects by detecting the emitting strain energy when elastic waves are generated by the initiation and growth of crack, plastic deformation, fiber breakage, matrix cleavage, or delamination. In the paper, AE signals generated under uniaxial tension were measured and analyzed using the $8{\times}8$ matrix piezo electric sensor. The electronic circuit to control the transmitting distance of AE signals was designed and constructed. The optical data storage system was also designed to store the AE signal of 64channels using LED (light emitting diode) elements. From the tests, it was shown that the source location and propagation path of AE signals in composite materials could be detected effectively by the $8{\times}8$ matrix piezo electric sensor.

• Journal of the Korean Society for Nondestructive Testing
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• v.27 no.1
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• pp.8-14
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• 2007

X-ray digital tomosynthesis is widely used in the nondestructive testing and evaluation, especially for the printed circuit boards (PCBs). In this study, we propose a simple method to reduce the blur artefact, frequently claimed in the conventional digital tomosynthesis based on SAA (shift-and-add) algorithm, and thus restore the image sharpness. The proposed method is basically based on the SAA, but has a correction procedure by finding blur artefacts from the forward-and back-projection for the firstly obtained, manipulated backprojection data. The manipulation is the replacement of the original data at the POI (plane-of-interest) by zeros. This method has been compared with the conventional SAA algorithm using the experimental measurements and Monte Carlo simulation for the designed PCB phantom. The comparison showed a much enhancement of sharpness in the images obtained from the proposed method.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.38 no.4
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• pp.292-301
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• 2001

IDDQ Testing is a very effective testing method to detect many kinds of physical defects occurred in CMOS VLSI circuits. In this paper, we consider the most commonly occurring bridging faults in current CMOS technologies and develop pattern generator for IDDQ testing using efficient IDDQ test algorithms. The complete set of bridging faults between every pair of all nodes(internal and external nodes) within circuit under test is assumed as target fault model. The merit of considering the complete bridging fault set is that layout information is not necessary. Implemented test pattern generator uses a new neighbor searching algorithm and fault collapsing schemes to achieve fast run time, high fault coverage, and compact test sets. Experimental results for ISCAS benchmark circuits demonstrate higher efficiency than those of previous methods.

• Journal of IKEEE
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• v.23 no.2
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• pp.739-742
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• 2019

In this paper, we propose enhanced DAP(Dose Area Product). The development of enhanced DAP proposed in this paper has optimized the area dose meter that was developed previously. The development of enhanced DAP performed Optimized design of charge integrator and ADC circuit, optimization of line transceiver for RS-485 communication, optimization of display circuit, and optimization of PC-based control program for interlocking and aging. As a result of evaluating the performance of the proposed system in an accredited testing laboratory, Radiation dose dependence and Radiation quality dependence were measured to be 4.2%, which is below ${\pm}15%$ of international standard. Energy range/Tube voltage was confirmed in the range of 30~150kV. The sensitivity difference between sensor field and sensor field area dose sensitivity was measured to be 4.3%, and it was confirmed that it operates normally under ${\pm}15%$ of international standard. In order to measure the reproducibility of the area dosimeter, it was confirmed that it was 0% and it was operated normally at less than 2% of IEC60580 recommendation. Digital resolution was confirmed to be a minimum unit of $0.01{\mu}Gy{\cdot}m^2$ within the error range for the reference dose per hour.

• Journal of IKEEE
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• v.26 no.3
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• pp.510-514
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• 2022

In this paper, we propose the development of high-sensitivity low-end radiation measuring sensor module. The proposed measurement sensor module is a scintillator + photomultiplier(SiPM) sensor optimization structure design, amplification and filter and control circuit design for sensor driver, control circuit design including short-distance communication, sensor mechanism design and manufacturing, and GUI development applied to prototypes consists of, etc. The scintillator + photomultiplier(SiPM) sensor optimization structure design is designed by checking the characteristics of the scintillator and the photomultiplier (SiPM) for the sensor structure design. Amplification, filter and control circuit design for sensor driver is designed to process fine scintillation signal generated by radiation with a scintillator using SiPM. Control circuit design including short-distance communication is designed to enable data transmission through MCU design to support short-range wireless communication function and wired communication support. The sensor mechanism design and manufacture is designed so that the glare generated by wrapping a reflective paper (mirroring) on the outside of the plastic scintillator is reflected to increase the efficiency in order to transmit the fine scintillation signal generated from the plastic scintillator to the photomultiplier(SiPM). The GUI development applied to the prototype expresses the date and time at the top according to each screen and allows the measurement unit and time, seconds, alarm level, communication status, battery capacity, etc. to be expressed. In order to evaluate the performance of the proposed system, the results of experiments conducted by an authorized testing institute showed that the radiation dose measurement range was 30 𝜇Sv/h ~ 10 mSv/h, so the results are the same as the highest level among products sold commercially at domestic and foreign. In addition, it was confirmed that the measurement uncertainty of ±7.4% was measured, and normal operation was performed under the international standard ±15%.

• The Transactions of the Korea Information Processing Society
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• v.3 no.7
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• pp.1924-1937
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• 1996

In this paper, we propose a ESP(Extended Scan Path) architecture for multi- board testing. The conventional architectures for board testing are single scan path and multi-scan path. In the single scan path architecture, the scan path for test data is just one chain. If the scan path is faulty due to short or open, the test data is not valid. In the multi-scan path architecture, there are additional signals in multi-board testing. So conventional architectures are not adopted to multi-board testing. In the case of the ESP architecture, even though scan paths either short or open, it doesn't affect remaining other scan paths. As a result of executing parallel BIST and IEEE 1149.1 boundary scan test by using, he proposed ESP architecture, we observed to the test time is short compared with the single scan path architecture. Because the ESP architecture uses the common bus, there are not additional signals in multi-board testing. By comparing the ESP architecture with conventional one using ISCAS '85 bench mark circuit, we showed that the architecture has improved results.

• Journal of Power Electronics
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• v.5 no.2
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• pp.120-128
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• 2005

This paper deals with the analysis of switched reluctance motor drives for different drive circuit topologies used in automobile. So we attempt to improve the weaknesses associated with the asymmetric bridge converter in the limited internal environment of automotive application. Two kinds of c-dump converters are tested in terms of dump capacitor voltage, speed response according to the variation of advance angle and efficiency for the radiator cooling-fan drive of an automobile. They enable more economical and efficient converter topology for automobile industries. This paper describes the performance characteristics of 12V-250W-3000rpm SRM drives for automotive application. Computer simulation and experiment results are then presented to verify the performance of the two kinds of c-dump converters.