• Proceedings of the Korean Vacuum Society Conference
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• 2016.02a
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• pp.196.2-196.2
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• 2016

The design and development procedures of SF6 gas circuit breakers are still largely based on trial and error through testing although the development costs go higher every year. The computation cannot cover the testing satisfactorily because all the real processes arc not taken into account. But the knowledge of the arc behavior and the prediction of thermal plasmas inside SF6 interrupters by numerical simulations are more useful than those by experiments due to the difficulties to obtain physical quantities experimentally and the reduction of computational costs in recent years. In this paper, in order to get further information into the interruption process of a SF6 self-blast interrupter, which is based on the combination of thermal expansion and arc rotation, gas flow simulations with a CFD-arc modeling are performed during the whole switching process such as high-current period, pre-current zero period, and current-zero period. Through the complete work, the temperature of residual arcs as well as the breakdown index after current zero should be a good criterion to predict the dielectric capability of interrupters.

• Journal of KIISE:Computer Systems and Theory
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• v.30 no.3_4
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• pp.186-193
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• 2003

In recent years the complexity of digital systems has increased dramatically. Although semiconductor manufacturers try to ensure that their products are reliable, it is almost impossible not to have faults somewhere in a system at any given time. As complexity of circuits increases, the necessity of more efficient organized and automated methods for test generation is growing. But, up to now, most of popular and extensive methods for test generation nay be those which sequentially produce an output for an input pattern. They inevitably require a lot of time to search each fault in a system. In this paper, corresponding test patterns are generated through the partitioning method among those based on the exhaustive method. In addition, the method, which can discovers faults faster than other ones that have been proposed ever by inserting a pattern in parallel, is designed and implemented.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.20 no.5
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• pp.430-435
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• 2007

This paper describes the results of electrical characteristics assessment for organic insulations of polyethylene(PE) series insulations and acrylonitrile butadiene styrene copolymer(ABS). In the experiment, 4 kinds of specimens by composition density were tested in relative permittivity, specific resistance and tracking duration. A WinDETA system and a tracking test set manufactured for this assessment were used to measure the dielectric parameters and tracking duration, respectively. In measuring the tracking duration, the time from testing voltage application to testing circuit breaking due to the tracking current was measured. As a result, dielectric dispersion was observed in measuring the relative permittivity of ABS. It was confirmed that the relative permittivity decreased with the density of the PE series insulations and it depends rather on the temperature than frequency. In most specimens, specific resistance exponentially decreased with frequency and the result for each specimen was almost similar. By the way, in the tracking test, all the PE series insulations showed more excellent performance than ABS and especially in the case of HDPE, its tracking withstand performance was the best.

• Proceedings of the KSME Conference
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• 2001.06a
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• pp.447-452
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• 2001

An automated system is developed to perform fatigue crack growth tests under constant effective stress intensity factor range ${\Delta}K_{eff}$. In the system, crack length and crack opening load are measured in real-time by using the unloading elastic compliance method. The system consists of two personal computers, an analogue electrical subtraction circuit, a stepping motor, a stepping motor driver, a PIO board, and the application software used to integrate the whole system. The performance of the developed system was tested and discussed performing constant ${\Delta}K_{eff}$ crack growth tests on a CT specimen of 7075-T6 aluminum alloy. The performance of the system is found to be strongly dependent on the accuracy of measurements of crack opening load. Besides constant ${\Delta}K_{eff}$ testing, the system is expected to be successfully applied for automation of various fatigue tests.

• Journal of KIISE:Computer Systems and Theory
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• v.35 no.6
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• pp.284-292
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• 2008

The density of Memory has been increased by great challenge for memory technology; therefore, elements of memory become more smaller than before and the sensitivity to faults increases. As a result of these changes, memory testing becomes more complex. In addition, as the number of storage elements per chip increases, the test cost becomes more remarkable as the cost per transistor drops. Recent development in system-on-chip(SoC) technology makes it possible to incorporate large embedded memories into a chip. However, it also complicates the test process, since usually the embedded memories cannot be controlled from the external environment. We present a ARM processor-programmable built-in self-test(BIST) scheme suitable for embedded memory testing in the SoC environment. The proposed BIST circuit can be programmed vis an on-chip microprocessor.

• Proceedings of the KSR Conference
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• 2008.06a
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• pp.603-609
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• 2008

Nowadays, double-system of TFM(Track-side Functional Modules) developed instead of single-system in use of high speed line to acquisition more availability. Safety Law for Railroad recommend to quality certification of development and general railway machines. It is important to select metrics which form the bases for testing software products. A number of package software development part do not open source cords, so testing external characteristic vectors having relationship with metrics. In this paper, review the process for the TFM Point Modules, Universal Modules and Switchers, think about the test methode of circuit boards output performance by using TFM tester and Simulators.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.45 no.1
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• pp.14-19
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• 2008

Semiconductor testing area challenges many testing issues due to the minimization and ultra high performance of current semiconductors. Among these issues, signal integrity test on interconnections must be solved for highly integrated circuits like SoC. In this paper, we propose an effective pattern application method for signal integrity test on interconnects. Proposed method can be applied by using boundary scan architecture and very efficient test can be preceded with pretty short test time.

• Journal of the Korean Institute of Telematics and Electronics C
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• v.35C no.12
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• pp.13-22
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• 1998

In this paper, we propose a high-performance BICS(built-in current sensor) which is fabricated in 0.8${\mu}{\textrm}{m}$ single-poly two-metal process for IDDQ testing of CMOS VLSI circuit. The CUT(circuit under test) is 4-bit full adder with a bridging fault. Using two nMOSs that have different size, two bridging faults that have different resistance values are injected in the CUT. And controlling a gate node, we experimented various fault effects. The proposed BICS detects the faulty current at the end of the clock period, therefore it can test a CUT that has a much longer critical propagation delay time and larger area than conventional BICSs. As expected in the HSPICE simulation, experimental results of fabricated chip demonstrated that the proposed BICS can exactly detect bridging faults in the circuit.

• Journal of Korean Society of Occupational and Environmental Hygiene
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• v.17 no.2
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• pp.120-130
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• 2007

A oxygen generating closed-circuit SCBA for escape from fire will be newly developed and then a program for estimating service time for it should be required. A SCBA made on an experimental basis consisted of five components such as half facepiece (mask), $KO_2$ box, oxygen reservoir, $CO_2$ remover and hood. The half mask had a good fitting performance since fit factors for 10 subjects were all above 100. It was found that height of subjects should be the best variable to estimate service time. Measured service time was inversely correlated with height of subjects. Service life time could be estimated by interpolation and extrapolation using inverse relationship between height and measured service time, for example, 28 minutes for male and female of 170 cm during resting, 10 minutes at the walk of 4 km/h and 5 minutes at the walk of 6 km/h considering safety margin of 20%. The study implies that program for estimating service time for the SCBA should require subject's height, speed of walk (4 km/h and 6 km/h) and fit testing. Considering safety margin, selecting younger subjects would be better. The study on the number of subjects and selecting facial dimensions should be more needed for the final program.

• Transactions of the Korean Society of Mechanical Engineers A
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• v.35 no.7
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• pp.723-728
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• 2011

Since the performance of a vacuum circuit breaker (VCB) mainly depends on the spring operating mechanism, an analysis of the spring operating mechanism is required in order to improve the design of a VCB. In this study, the static stiffness of the spring was determined by using a material testing machine, and the test results were used to model the spring through computer simulation. The multi-body dynamic model of the spring was established by using the RecurDyn program. The dynamic model was verified by comparing the results of stem displacements and rotating angles of the brake shaft obtained from the simulation and from the experiments. After verification of the dynamic model of VCB, the cam profile of the VCB was optimized through multi-body dynamics simulation in order to improve the performance of the closing mechanism.