• Journal of The Institute of Information and Telecommunication Facilities Engineering
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• v.9 no.4
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• pp.153-157
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• 2010

In this paper, a dual band LNA (Low Noise Amplifier) with a LC-tank matching circuit is designed for 912MHz and 2.45GHz RFID reader. The operating frequency is decided by the LC-tank resonance. The simulated results demonstrate that S21 parameter is 11.683dB and 5.748dB at 912MHz and 2.45GHz, respectively, and the S11 are -10.796dB and -21.261dB, the S22 are -7.131dB and -14.877dB at the same frequencies. The measured NF (Noise Figure) is 0.471 and 1.726 at 912MHz and 2.45GHz, respectively.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.7 no.4
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• pp.743-749
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• 2003

By biasing the gate of cold-HEMT with a voltage slightly lower than the pinch-off point, a new small-signal modeling method that is free from gate degradation problem and requires no additional DC measurement is proposed in this paper. The method has shown excellent agreement between modeled and measured S-parameters up to 62 GHz at 49 different normal operating bias points.

• Proceedings of the KIPE Conference
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• 2000.07a
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• pp.90-94
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• 2000

A conventional power supply to drive a microwave oven has ferro-resonant transformer and high voltage capacitor(HVC). Though it is simple transformer is bulky heavy and has low-efficiency. To improve this defect a high frequency switching inverter-type power supply has been investigated an developed. in recent years. But because of it's additional circuit and devices inverter-type power supply is more expensive than conventional one. In this paper The design procedure of a novel HVC embedded high frequency transformer is proposed for down-sizing and cost reduction. Also transformer equivalent circuit model is derived by FEM analysis and parameter measurements. And the operation of proposed HVC embedded transformer is verified by simulation and experimental results.

• Journal of Electrical Engineering and Technology
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• v.10 no.5
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• pp.2040-2045
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• 2015

This paper deals with the electromagnetic and thermal analysis of high speed induction motor. The induction motor is analyzed by time-varying magnetic finite element method and its thermal analysis is carried out by using analytical lumped-circuit method. Analysis results are compared with the experiment of 29kW high speed motor prototype at 12,000rpm.

• Proceedings of the KIEE Conference
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• 2001.07b
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• pp.717-719
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• 2001

This paper deals with simulation of the three-phase dc reactor type fault current limiter(FCL). This is a preliminary step to develop the FCL's faculties for an application to high voltage transmission line. A three-phase dc reactor type FCL consists of transformers, diodes, and a superconducting coil. By this simulation for the short-circuit test we can investigate the safety of FCL's elements. And, result of simulation will contribute parameter toward optimal design.

• Proceedings of the KIEE Conference
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• 1999.07f
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• pp.2638-2640
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• 1999

This paper proposes a current-fed type high frequency inverter using a soft switching technology Zero-Voltage-Switching to reduce turn on and off loss at the switching. The analysis of the proposed circuit was described by using normalized parameter and operating characteristics have been evaluated as to switching frequency and parameters. In the future, the proposed circuit is considered to be useful for induction heating applications.

• Transactions on Electrical and Electronic Materials
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• v.8 no.1
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• pp.21-25
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• 2007

A two-dimensional TCAD MEDICI simulator was used to examine the voltage transfer characteristics, on-off switching properties and latch-up of a CMOS inverter as a function of the n-channel length and doping levels. The channel in a LDMOSFET encloses a junction-type source and is believed to be an important parameter for determining the circuit operation of a CMOS inverter. The digital logic levels of the output and input voltages were analyzed from the transfer curves and circuit operation. The high and low logic levels of the input voltage showed a strong dependency on the channel length, while the lateral substrate resistance from a latch-up path in the CMOS inverter was comparable to that of a typical CMOS inverter with a guard ring.

• Proceedings of the IEEK Conference
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• 2008.06a
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• pp.601-602
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• 2008

This paper presents pulse-frequency modulation(PFM) to improve the light-load efficiency. The proposed circuit is designed by using the device parameter of standard $0.13{\mu}m$ CMOS process. The performance of proposed circuit is evaluated by HSPICE simulation Measured efficiency in a light-load is measured 78-90 % for 0.1 to 100mA output current.

• Proceedings of the IEEK Conference
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• 2008.06a
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• pp.1069-1070
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• 2008

This paper presents a high efficient two-stage interleaved synchronous buck CMOS DC-DC converter. The proposed circuit has a fixed duty cycle as 0.5 by an added buck converter. And it causes the best ripple cancelation of the output current ripple. The proposed circuit was simulated by HSPICE with a standard CMOS $0.35{\mu}m$ process parameter.

• The Transactions of the Korean Institute of Electrical Engineers B
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• v.48 no.6
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• pp.316-321
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• 1999

Disk type single phase switched reluctance motor which is a simple robust construction, simple control circuit and low manufacturing cost, has a characteristics of axial and radial flux machines. However, because this DSPSRM has a complicated magnetic circuit, it is difficult to analyze the design characteristics.. In this study, the calculation of design parameter based on the conventional design theory of electric machine and the characteristics analysis by computer simulation was performed. As the DSPSRM has the characteristics of both AFM and RFM, it is difficult to analyze its characteristics by the 2D FEM. 3D FEM was applied in the analysis of energy distribution and approximated calculation of torque characteristics with rotor positions. With analysis results, prototype of DSPSRM is manufactured.