• 제목/요약/키워드: Circuit

검색결과 17,001건 처리시간 0.038초

30AF 차단기 순시 Trip 동작 특성분석을 통한 저압차단기의 안전성 개선방안 (A Safety Improvement of Low Voltage Circuit-breakers through Analysis of Instantaneous Trip Characteristics of 30AF Circuit-Breakers)

  • 김주철;임정균;이상중
    • 조명전기설비학회논문지
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    • 제24권12호
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    • pp.78-83
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    • 2010
  • The domestic 30AFs that are currently being produced show many problems due to different instantaneous trip characteristics in case of short-circuit. The troubles may cause explosion by excessive short-circuit capacities and arc emission, which results in a wide range of blackout. The function and safety of the low voltage circuit breakers installed before the end load are very important. This paper presents an idea on the safety improvement of the low voltage circuit-breakers through the analysis of instantaneous trip characteristics of domestic 30AF circuit-breakers.

선박 배선용 차단기 자동 선정 S/W 개발 (Development of Circuit Breaker Automatic Selection Program)

  • 하상호
    • 대한조선학회 특별논문집
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    • 대한조선학회 2017년도 특별논문집
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    • pp.88-92
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    • 2017
  • As the considerable request of the fast and accurate way of the selection of circuit breaker is increased, we introduce the development of software of circuit breaker selection for the marine use. Originally, the selection of circuit breaker has been carried out by manual in the marine project. It is not the easy work to select the proper type of circuit breaker to check the time-current characteristic curves of each type of circuit breakers for the various type of loads. In this regards, we developed the software to select the proper type of circuit breaker to confirm fast and accurately. And, we introduce the course of the development of the software for the selection of circuit breaker.

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게이트 레벨 천이고장을 이용한 BiCMOS 회로의 Stuck-Open 고장 검출 (Detection of Stuck-Open Faults in BiCMOS Circuits using Gate Level Transition Faults)

  • 신재흥;임인칠
    • 전자공학회논문지A
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    • 제32A권12호
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    • pp.198-208
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    • 1995
  • BiCMOS circuit consist of CMOS part which constructs logic function, and bipolar part which drives output load. Test to detect stuck-open faults in BiCMOS circuit is important, since these faults do sequential behavior and are represented as transition faults. In this paper, proposes a method for efficiently detecting transistor stuck-open faults in BiCMOS circuit by transforming them into slow-to=rise transition and slow-to-fall transition. In proposed method, BiCMOS circuit is transformed into equivalent gate-level circuit by dividing it into pull-up part which make output 1, and pull-down part which make output 0. Stuck-open faults in transistor are modelled as transition fault in input line of gate level circuit which is transformed from given circuit. Faults are detceted by using pull-up part gate level circuit when expected value is '01', or using pull-down part gate level circuit when expected value is '10'. By this method, transistor stuck-open faults in BiCMOS circuit are easily detected using conventional gate level test generation algorithm for transition fault.

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The Effects of Circuit Training and Circuit Training with Whole Body Vibration on Pulmonary Function in Adolescent

  • Jun, Hyun ju;Jeong, Chan Joo;Yang, Hoe Song;Jeong, Ye rim;Jegal, Hyuk;Yoo, Young Dae
    • 국제물리치료학회지
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    • 제6권2호
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    • pp.902-907
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    • 2015
  • The purpose of this study was to parallel circuit training and circuit training with sonic systemic mechanism was to compare the differences in pulmonary function and chest expansion in adult men. This study was performed on 20 subjects. 20 subjects were divided into two groups; Circuit training group(n=10), Circuit training with sonic systemic mechanism(n=10). Both of the group performed the exercise 3 times a week for 5 weeks. The data was analyzed by the Repeated t-test for comparing before, during and after changes of factors in each group and the Independent t-test for comparing the between groups. The result are as follows. Circuit training group was statistically significant difference FVC, FEV1/FVC(p<.05), Circuit training with sonic systemic mechanism group was statistically significant difference PEF, VC in pulmonary function(p<.05). Circuit training group was statistically significant difference FEV1/FVC of between the two group in pulmonary function(p<.05). Circuit training group and circuit training with sonic systemic mechanism group was statistically significant difference in chest expansion(p<0.05) and there was no statistically significant difference of between the two group in chest expansion(p>.05).

단일유로 멀티사이클 및 바이패스유로 멀티사이클 적용 냉동시스템의 성능특성에 관한 실험적 연구 (An Experimental Study on the Performance Characteristics of a Single-Circuit Multi Cycle and a Bypass Two-Circuit Multi Cycle)

  • 송영승;정해원;윤원재;김용찬
    • 설비공학논문집
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    • 제23권7호
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    • pp.513-519
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    • 2011
  • The object of this study is to investigate the performance characteristics of refrigerators using a single-circuit multi cycle and a bypass two-circuit multi cycle. Each refrigeration cycle was tested by varying secondary fluid mass flow rate and temperature. Based on the experimental data, the optimum refrigerant charge was 48 g and the COP at the optimum secondary fluid mass flow rate was 1.53 for the single-circuit multi cycle. For freezer(F)-only mode, both the single-circuit multi cycle and the bypass two-circuit multi cycle were operated at overcharge conditions, resulting in an increase of the secondary fluid mass flow rate. The maximum COPs of the single-circuit multi cycle and the bypass two-circuit multi cycle were 1.22 and 1.35, respectively. The COP increased by 10.7% with the application of the bypass two-circuit multi cycle.

결합계수 해석에 의한 유도가열용 인버터의 공진회로 설계법 (A Resonant Circuit Design of the Inverter for Induction Heating by Analysis of the Coupling Coefficient)

  • 이광직;김주홍
    • 한국조명전기설비학회지:조명전기설비
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    • 제11권6호
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    • pp.90-95
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    • 1997
  • 고주파 유도가열을 위한 인버터의 공진회로 설계에서 인덕턴스 L의 작용과, 출력전달 요소로 사용된 변압기의 결합계수, 그리고 코일을 사용한 가열부하의 결합계수가 공진회로의 출력, 회로의 Q와 공진주파수에 큰 영향을 주고 있음을 등가회로를 도출하여 그 특성을 해석하였다. 또한 변압기를 테브난 등가회로로 구성할 경우, 변압기의 이차측 임피던스를 일차측 임피던스고 환산하면, 권선비 n$^2$에 비례 할 뿐만 아니라 결합계수 $K^2$에도 비례함을 도출하여 결합계수형 테브난 등가회로에 의한 정확성이 큰 인버터 공진회로 설계의 기초방식을 나타냈다.

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실업계 고등학교 전자회로 실습 과제 개발 (A Development of The Practice Subject in Electronic Circuit Textbook of Industrial High School)

  • 장기훈;임동균;신승중
    • 한국정보처리학회:학술대회논문집
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    • 한국정보처리학회 2010년도 춘계학술발표대회
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    • pp.276-279
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    • 2010
  • This paper is about a development of effective practice subject in electronic circuit textbook of industrial high school. This paper introduces generally about the practice subject in electronic circuit textbook of industrial high school of the 7th National curriculum and presents problem of current practice and makes an alternative idea that improve current practice. The contents of current electronic circuit textbook of industrial high school have variety topics and these topics are independence and separated. So students have some problems to apply of learned knowledge. Therefore, researcher improved the various electronic circuit practice in current electronic circuit text book and added new practice and manufactured a electronic circuit module based on these circuits. And researcher suggested new practice subject what useful electronic equipment that assembled module of result of electronic circuit practice of each section. When the last subjects are accomplished the students may have feel of achievement and high study effect from these practice. The practice subjects of this paper were manufactured after verification and tested it's performance by computer simulation program I hope that these new practice subjects make effective understanding and application of electronic circuit for student.

Drive Circuit of 4-Level Inverter for 42V Power System

  • Park, Yong-Won;Sul, Seung-Ki
    • KIEE International Transaction on Electrical Machinery and Energy Conversion Systems
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    • 제11B권3호
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    • pp.112-118
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    • 2001
  • In the near future, the voltage of power system for passenger vehicle will be changed to 42V from existing 14V./ Because of increasing power and voltage ratings used in the vehicle the motor drive system has high switching dv/dt and it generates electromagnetic interference (EMI) To solve these problems multi-level inverter system may be used The feature of multi-level inverter is the output voltage to be synthesized from several levels of voltage Because of this feature high switching dv/dt and EMI can be reduced in the multi-level inverter system But as the number of level is increased manufacturing cost is getting expensive and system size is getting large. Because of these disadvantages the application of multi-level inverter has been restricted only to high power drives. The method to reduce manufacturing cost and system size is to integrate circuit of multi-level inverter into a few chips But isolated power supply and signal isolation circuit using transformer or opto-coupler for drive circuit are obstacles to implement the integrated circuit (IC) In this paper a drive circuit of 4-level inverter suitable for integration to hybrid or one chip is proposed In the proposed drive circuit DC link voltage is used directly as the power source of each gate drive circuit NPN transistors and PNP transistors are used to isolate to transfer the control signals. So the proposed drive circuit needs no transformers and opto-couplers for electrical isolation of drive circuit and is constructed only using components to be implemented on a silicon wafer With th e proposed drive circuit 4- level inverter system will be possible to be implemented through integrated circuit technology Using the proposed drive circuit 4- level inverter system is constructed and the validity and characteristics of the proposed drive circuit are proved through the experiments.

PCB에 구현한 멤리스터 에뮬레이터 회로 및 응용 (Practical Implementation of Memristor Emulator Circuit on Printed Circuit Board)

  • 최준명;신상학;민경식
    • 전기전자학회논문지
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    • 제17권3호
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    • pp.324-331
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    • 2013
  • 본 논문에서는 멤리스터 에뮬레이터 회로를 PCB 보드 상에서 구현하여 이의 측정을 통해서 멤리스터의 고유한 pinched hysteresis 특성을 관찰하였다. PCB 보드 상에서 구현된 멤리스터 에뮬레이션 회로는 간단한 부품으로 구성되어 있고 복잡한 회로 블록을 사용하지 않았기 때문에 집적회로의 구현 시에도 매우 작은 면적으로 설계가 가능하다는 장점이 있다. 또한 본 논문에서는 프로그램 가능한 이득증폭기를 멤리스터 에뮬레이션 회로를 사용하여 설계해서 이 회로의 전압이득이 멤리스터의 저항의 프로그래밍을 통해서 조절이 가능하다는 것을 보였다. 이득증폭기에 사용되는 멤리스터 에뮬레이션 회로의 구현을 위해서 멤리스터 소자의 특성 중에 하나인 threshold switching 특성이 회로로 구현되어 VREF 보다 낮은 전압이 인가되었을 때는 멤리스터의 저항 값이 변하지 않도록 설계하였고 이의 동작을 시뮬레이션을 통해서 검증하였다. 본 논문에서 PCB 보드 상에서 구현되고 검증된 멤리스터 에뮬레이션 회로와 이 회로를 이용한 프로그램 가능한 이득증폭기는 멤리스터 소자의 실제 제작이 불가능한 경우에, 멤리스터의 동작과 기능, 특성 및 멤리스터 응용회로의 이해에 많은 도움이 될 것이다.

계층 구조와 Incremental 기능을 갖는 MOS 회로 추출기 (A Hierarchical and Incremental MOS Circuit Extractor)

  • 이건배;정정화
    • 대한전자공학회논문지
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    • 제25권8호
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    • pp.1010-1018
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    • 1988
  • This paper proposes a MOS circuit extractor which extracts a netlist from the hierarchical mask information, for the verification tools. To utilize the regularity and the simple representation of the hierarchical circuit, and to reduce the debug cycle of design, verification, and modification, we propose a hierarvhical and incremental circuit extraction algorithm. In flat circuit extraction stage, the multiple storage quad tree is used as an internal data structure. Incremental circuit extraction using the hierarchical structure is made possible, to reduce the re-extraction time of the modified circuit.

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