• Transactions of the Korean Society for Noise and Vibration Engineering
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• v.11 no.8
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• pp.331-337
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• 2001

The purpose of this study is to analyze the principal causes of vibration problem and find out the method of vibration reduction in a chip-mount system. The principal causes are investigated through measurements of vibration spectrum and model parameters. Modal parameters are obtained by using an experimental model test. Based on the model parameters from experiments. a model of finite element method is formulated. The model presents effective redesign of increasing the natural frequencies in order to reduce the vibration of a chip-mount system. Further, through computer simulation for the behavior of head to be main vibration source, the best acceleration pattern of head movement can be verified to achieve effective head-positioning and reduce the vibration due to head movement.

• Transactions of the Korean Society for Noise and Vibration Engineering
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• v.21 no.8
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• pp.768-773
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• 2011

This work presents an experimental investigation on vibration control of the active hybrid mount system for naval ships. To reduce unwanted vibrations, this paper proposes an active mount which consists of rubber element, piezostack actuator and inertial mass. The rubber element supports a mass. The piezostack actuator generates a proper control force and supply it to the mount system. To avoid being broken piezostack actuator, an actuator of the proposed mount is devised as an inertial type, in which a piezostack actuator is positioned between inertial mass and rubber element. Vibration control performances of the active mount system are evaluated via experiment. To attenuate the unwanted vibrations transferred from upper mass, the feedforward control is designed. In order to implement a control experiment, the active mount system supported by four active mounts is constructed. For realization of the controller, one-chip board is manufactured and utilized. Subsequently, vibration control performances of the proposed active mount system are experimentally evaluated in frequency domains.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.12 no.9
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• pp.4138-4146
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• 2011

In surface mount technology, with cellular phones and flat panel displays shrinking in size, the electric goods for making these things are getting smaller as well. Therefore, the technology of mounting components such as 0402 and 0603 Chip is on the rise. The chip mount manufacturing companies have studied the mount technology to prevent the missing insertions or improper insertion. This study suggests arranging the mechanical structure by using fiber sensors to eliminate missing insertions or improper insertions and developing the technology for upgrading system algorithms.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2016.05a
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• pp.674-675
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• 2016

In this paper, we propose a manufacturing process model of Internet of Things devices using a Printed Circuit Board (PCB)-mounted RFID tag chip for reducing electronic wastes. Electrical and electronic products require a PCB surface mount and many examination. Also, conventional barcode systems cannot provide traceability management in PCB manufacturing before finishing Surface Mount Technology (SMT) process. The proposed process model does not require workers' attaching and detaching process unlike barcode systems. Also, RFID tag chip can record all the data in manufacturing steps. Thus, the number of connections to a database management system (DBMS) can be reduced.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2011.05a
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• pp.519-521
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• 2011

NFC is enable communication between wireless davice within a distance of 10cm, one type of non-contanct short-range wireless communicaton using 13.56MHz frequency band. This is one type of RFID technology which include file transfer, contactless payment and RFID. NFC technology is standardized in 2003 already, it received much attention recently because NFC is announced full support in Android 2.3. And as APPLE is announced that have plan to monunt in iphone 5,mobile payment system is expected to change. Already SAMSUNG is launched NEXUS S mounted NFC chip and announced NFC chip will be mount GALAXY S2 LG Electronics is statemented NFC chip will be mount on smart phone that will realese this year. In this study, will announce about analysis for NFC technology and recently trend and used case.

• Journal of the Korean Society of Manufacturing Process Engineers
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• v.6 no.3
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• pp.24-30
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• 2007

The FPCs(Flexible Printed Circuit) are currently used in several electronic products like digital cameras, cellular phones because of flexible material characteristics. Because the FPC is usually small size and flexible, only one FPC should not enter chip mounting process, instead, several FPCs are placed on the large rigid pallette and enter into the chip mounting process. Currently the job of mounting FPC on the pallette is carried by totally manual way. Thus, the goals of the research is develop the automatic machine of FPC mounting on pallette using vision alignment. Instead of using two cameras or using moving one camera, the proposed vision system with only one fixed camera is adopted. Moreover, the two picker heads which can handle two FPCs simultaneously are used to make process time shortened. The procedure of operation is firstly to measure alignment error of FPC, correct alignment errors, and finally mount well-aligned FPC on the pallette. The vision technology is used to measure alignment error accurately, and precision motion control is used in correcting errors and mounting FPC.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.15 no.3
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• pp.271-277
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• 2004

A Si(Silicon) MEMS(Micro Electro Mechanical System) package using a doped lossy Si carrier for CPW(Coplanar Waveguide) MMICs(Microwave and Millimeter-wave Integrated Circuits) is proposed in order to reduce parasitic problems of leakage, coupling and resonance. The proposed chip-carrier scheme is verified by fabricating and measuring a GaAs CPW on the two types of carriers(conductor-back metal, doped lossy Si) in the frequency from 0.5 to 40 ㎓. The proposed MEMS package using the lightly doped lossy(15 Ω$.$cm) Si chip-carrier and the HRS(High Resistivity Silicon, 15 ㏀$.$cm) shows the optimized loss and parasitic problems-free since the doped lossy Si-carrier effectively absorbs and suppresses the resonant leakage. The Si MEMS package for CPW MMICs has an insertion loss of only - 2.0 ㏈ and a power loss of - 7.5 ㏈ at 40 ㎓.

• 제어로봇시스템학회:학술대회논문집
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• 2001.10a
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• pp.139.2-139
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• 2001

This paper presents identification and control of a surface mounting system. The mount head of the system is modeled to analyze its dynamic characteristics, which is critical to the placement performance of the mounter. Based on this model, an identification work is carried out to estimate the modeled parameters by using genetic algorithm (GA), which plays a role of minimizing an error between the actual response and the model response. Having obtained the identified parameters, we design a disturbance observer control to compensate the friction. The disturbance observer can estimate the friction force and the uncertainty of the system. From the experimental results, it is found that the proposed disturbance observer plus PID controller show a better performance than PID controller alone. In order to accomplish a stable contact content control for fast mounting a ...

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.20 no.9
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• pp.930-935
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• 2009

This paper describes a miniaturezed metamaterial BT chip antenna for mobile devices. The size of the proposed antenna is $3.0\;mm(W){\times}2.0\;mm(L){\times}1.2\;mm(H)$. And it is fabricated by chip type. The zeroth-order resonant properties are analyzed by magnitude and phase distributions of the surface current using surface current scanning system. The antenna offers omni-directional radiation patterns and measured 3D average gain is over - 1.7 dBi.

• Journal of the Institute of Electronics Engineers of Korea SC
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• v.37 no.3
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• pp.63-71
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• 2000

Infrared (IR) detector chip, which detects the IR radiation from all of the objects and converts to image signal, is usually fabricated using hybrid bonding technology with detector away and readout integrated circuit (ROIC). In this study, we designed the readout circuit and simulated its operations. Fabricating readout circuit chips, we measured operation results satisfying its design requirements in 6V supply voltage. After we mount the IR detector chip in the manufactured thermal image system, thermal images were implemented. The obtained thermal images for high and room temperature target objects are sufficiently recognizable. Using the low noise thermal Image system, we expect to obtain thermal images with higher temperature resolution.