• Journal of the Institute of Electronics and Information Engineers
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• v.50 no.6
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• pp.105-113
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• 2013

In this paper a micro solar energy harvesting system with MPPT(Maximum Power Point Tracking) control using a miniature PV(photovoltaic) cell of which the output is less than 0.5V is proposed. The MPPT control is implemented using linear relationship between the open-circuit voltage of a PV cell and its MPP(Maximum Power Point) voltage such that a pilot PV cell can track the MPP of the main PV cell in real time. The proposed circuit is designed in 0.18um CMOS process. The designed chip area is $900um{\times}1370um$ including a load charge pump and pads. Measured results show that the designed system can track the MPP voltage changes with variations of light intensity. The designed circuit with MPPT control delivers MPP voltages to load even though the load is heavy such that it can supply more power when the MPPT control is applied. The proposed circuit does not require any precharged battery resulting in more suitability for miniaturized self-powered systems compared to the existing works.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.9 no.2
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• pp.360-369
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• 2008

The solar cells should be operated at the maximum power point because its output characteristics were greatly fluctuated on the variation of insolation, temperature and load. It is necessary to install an inverter among electric power converts by means of the output power of solar cell is DC. The inverter is operated supply a sinusoidal current and voltage to the load and the interactive utility line. In this paper, the proposes a photovoltaic system is designed with a step up chopper and single phase PWM voltage source inverter. Synchronous signal and control signal was processed by one-chip microprocessor for stable modulation. The step up chopper is operated in continuous mode by adjusting the duty ratio so that the photovoltaic system tracks the maximum power point of solar cell without any influence on the variation of insolation and temperature for solar cell has typical dropping character. The single phase PWM voltage source inverter is consists of complex type of electric power converter to compensate for the defect, that is, solar cell cannot be develop continuously by connecting with the source of electric power for ordinary using. It can be cause the efect of saving electric power, from 10 to 20%. The single phase PWM voltage source inverter operates in situation, that its output voltage is in same phase with the utility voltage. The inverter are supplies an ac power with high factor and low level of harmonics to the load and the utility power system.

• Journal of the Microelectronics and Packaging Society
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• v.17 no.2
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• pp.55-61
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• 2010

The device with tantalum silicide heater were bonded by Ag paste and Au SBB(Stud Bump Bonding) onto the Au coated substrate. The shear test after Au ABB and the thermal performance under current stressing were measured. The optimum condition of Au SBB was determined by fractured surface after die shear test and $350^{\circ}C$ for substrate, $250^{\circ}C$ for die during flip chip bonding with bonding load of about 300 g/bump. With applying 5W through heater on the device, the maximum temperature with Ag paste bonding was about $50^{\circ}C$. That with Au SBB on Au coated Si substrate showed $64^{\circ}C$. The difference of maximum temperatures is only $14^{\circ}C$, even though the difference of contact area between Ag paste bonding and Au SBB is by about 300 times and the simulation showed that the contact resistance might be one of the reasons.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.28 no.11A
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• pp.902-911
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• 2003

Using InGaP/GaAs HBT power cells with a 2.0${\times}$20$\mu\textrm{m}$$^2$ emitter area of a unit HBT, a two stage MMIC power amplifier has been developed for IMT-2000 handsets. An active-bias circuit has been used for temperature compensation and reduction in the idling current. Fitting on measured S-parameters of the HBT cells, circuit elements of HBT's nonlinear equivalent model have been extracted. The matching circuits have been designed basically with the extracted model. A two stage HBT MMIC power amplifier fabricated using ETRI's HBT process. The power amplifier produces an 1-㏈ compressed output power(P$\_$l-㏈/) of 28.4 ㏈m with 31% power added efficiency(PAE) and 23-㏈ power gain at 1.95 GHz in on-wafer measurement. Also, the power amplifier produces a 26 ㏈m output power, 28% PAE and a 22.3-㏈ power gain with a -40 ㏈c ACPR at a 3.84 ㎒ off-center frequency in COB measurement.quency in COB measurement.

• Proceedings of the KIPE Conference
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• 2003.07a
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• pp.279-282
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• 2003

In this paper, to apply piezoelectric transformer for PDA backlight inverter, piezoelectric transformer using the composition which $Nb_2O_5$ added into PNW-PMN-PZT ceramics was fabricated as Rosen-type one with the size of $1165mm^3$. And their electrical characteristics were investigated with the variations of load resistance and driving frequency And then, the driving circuit for PDA CCFL(0.6W) which composed of the two MOSFETs connecting in series was manufactured using piezoelectric transformer, VCO and one-chip microprocessor. After driving for 25 min using the proposed circuit for PDA CCFL(0.6W), driving frequency of 214.4kHz, input voltage of 31.78 V and input current of 21.1mA were shown. And then, output voltage of 293.2 V and output current of 2.2mA were shown. At the same time, efficiency of 96.2$\%$ and temperature rise of $3.6^{\circ}C$ were appeared at the piezoelectric transformer.

• Journal of IKEEE
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• v.15 no.2
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• pp.134-142
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• 2011

This paper describes a tripple-mode high-efficiency DC-DC buck converter. The DC-DC buck converter operate in PWM(Pulse Width Modulation) mode at moderate to heavy loads(100mA~500mA), in PFM(Pulse Frequency Modulation)at light loads(1mA~100mA), and in LDO(Low Drop Out) mode at the sleep mode(<1mA). In PFM mode DPSS(Dynamic Partial Shutdown Strategy) is also employed to increase the efficiency at light loads. The triple-mode converter can thus achieve high efficiencies over wide load current range. The proposed DC-DC converter is designed in a CMOS 0.18um technology. It has a maximum power efficiency of 96.4% and maximum output current of 500mA. The input and output voltages are 3.3V and 2.5V, respectively. The chip size is 1.15mm ${\times}$ 1.10mm including pads.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.20 no.2
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• pp.38-44
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• 2006

In this paper, a new interference-free Home CDMA-PLC(Code Division Multiple Access-Power Line Communication) system based on the binary ZCD(Zero Correlation Duration) spreading code is proposed as a key solution to overcome the previous problems. Binary ZCD spreading code sets with enlarged family sizes are generated by carrying out a chip-shift operation of the preferred pairs. The properties or the proposed ZCD-PLC systems are effective for MPI(Multi-Path Interference) and MAI (Multiple Access Interference) cancellation in the CDMA-PLC systems. By BER performance simulation, we certified the availability of proposed ZCD-CDMA-PLC system.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.44 no.1
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• pp.28-35
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• 2007

In this paper, an ultra low voltage SRAM design method based on dual-boosted cell bias technique is described. For each read/write cycle, the wordline and cell power node of the selected SRAM cells are boosted into two different voltage levels. This enhances SNM(Static Noise Margin) to a sufficient amount without an increase of the cell size, even at sub 1-V supply voltage. It also improves the SRAM circuit speed owing to increase of the cell read-out current. The proposed design technique has been demonstrated through 0.8-V, 32K-byte SRAM macro design in a $0.18-{\mu}m$ CMOS technology. Compared to the conventional cell bias technique, the simulation confirms an 135 % enhancement of the cell SNM and a 31 % faster speed at 0.8-V supply voltage. This prototype chip shows an access time of 23 ns and a power dissipation of $125\;{\mu}W/Hz$.

• Journal of the Korean Institute of Intelligent Systems
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• v.16 no.4
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• pp.485-492
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• 2006

This paper deals with implementation of network for distributed control system of a humanoid robot ISHURO(Inha Semyung Humanoid Robot). A humanoid robot needs much degree of freedom structurally and much data for having flexible movement. To realize such a humanoid robot, distributed control method is preferred to the centralized one since it gives a compactness, modularity and flexibility for the controllers. For organizing distributed control system of a humanoid robot, a control processor on a board is needed to individually control the joint motor and communication technology between the processors is required to transmit its information within control time. The processor is DSP-based processor and includes CAN network on a chip. It shares the computational load such as monitoring the sensor information and controlling the actuator between each of modules. In this paper, the communication architecture is suggested and its message protocol are discussed including message structure, time consumption for transmission, and controller structure at the view of distributed control for a humanoid robot. All of the sequence are simulated with Matlab and then verified with real walking experiment by ISHURO.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.17 no.12 s.115
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• pp.1240-1248
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• 2006

This paper presents an UHF band(911 MHz) RFID tag antenna which has near-isotropic radiation pattern and easy conjugate impedance matching characteristics to any commercial chips of usual practice through the application of an inductively-coupled feeding. The proposed antenna of compact size $40{\times}46mm\;(0.12{\times}0.14{\lambda})$ has, at normal incidence, the maximum RCS of $-18.5dBm^2$ and the 3 dB RCS bandwidth of 9 MHz(1 %) in case of short chip load. It has the maximum and minimum RCS' of $-16.9dBm^2\;and\;-21.4dBm^2$ depending on the incident angles. The difference of about 4.5 dB is relatively small compared with that (about 70 dB) of a pure dipole antenna. The designed antenna has been fabricated and its RCS' have been measured varying the angles of incidence. The measured RCS' have been found to have good agreement with the simulated ones.