• 제목/요약/키워드: Chip integration

검색결과 202건 처리시간 0.025초

Development of totally implantable total artificial heart controller

  • Choi, Won-Woo;Lee, Sang-hoon;Lee, Woo-Cheol;Min, Byoung-Gu
    • 제어로봇시스템학회:학술대회논문집
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    • 제어로봇시스템학회 1991년도 한국자동제어학술회의논문집(국내학술편); KOEX, Seoul; 22-24 Oct. 1991
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    • pp.758-761
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    • 1991
  • Using one chip microcontroller 87Cl96 (On chip EPROM type) and EPLD (Erasable & Programable Logic Device), an implantable control system to drive pendulum type electromechanical total artificial heart was developed. This control system consists of 4 parts, main management system, motor driver with power regulator, state monitoring system and communication part. The main system has the functions for speed detection, PI(proportional and integration) control, PWM generation, communication and analog data processor. Two kinds of power system were used and separated by 8 photo coupler arrays to improve the system stability. The performances of each compartments were compared with our previous z80 microprocessor based control system and good correspondences was shown. Logic power consumption was reduced to a one third of our previous controller. Using mock circulation tests, the overall performances of control system are evaluated.

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21C Korean Lithography Roadmap

  • Baik, Ki-Ho;Yim, Dong-Gyu;Kim, Young-Sik
    • 대한전자공학회:학술대회논문집
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    • 대한전자공학회 1999년도 하계종합학술대회 논문집
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    • pp.269-274
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    • 1999
  • As the semiconductor industry enters the next century, we are facing to the technological changes and challenges. Optical lithography has driven by the miniaturisation of semiconductor devices and has been accompanied by an increase in wafer productivity and performance through the reduction of the IC image geometries. In the last decade, DRAM(Dynamic Random Access Memories) have been quadrupoling in level of integration every two years. Korean chip makers have been produced the memory devices, mainly DRAM, which are the driving force of IC's(Integrated Circuits) development and are the technology indicator for advanced manufacturing. Therefore, Korean chip makers have an important position to predict and lead the patterning technology. In this paper, we will be discussed the limitations of the optical lithography, such as KrF and ArF. And, post optical lithography technology, such as E-beam lithography, EUV and E-beam Projection Lithography shall be introduced.

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원 칩 프로세서 기반의 CSAM 의 게이트 피크 검출 구현 (Implementation for Gated Peak Detector of CSAM based on One Chip Processor)

  • 라기공;류광렬;허창우;민구이 썬
    • 한국정보통신학회:학술대회논문집
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    • 한국해양정보통신학회 2010년도 추계학술대회
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    • pp.776-779
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    • 2010
  • 본 논문은 CSAM의 게이트 피크 검출장치를 단일 칩 기반으로의 구현을 제안한다. 게이트 피크 검출장치의 구현은 VHDL을 이용한다. 제안된 방법은 초음파 현미경 뿐만 아니라 게이트 피크 검출을 이용하는 모든 시스템에 적용과 통합이 가능하며 기존의 방법과 비교하여 면적과 응용면에서 효율의 차별화를 제시한다.

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Integration of 5-V CMOS and High-Voltage Devices for Display Driver Applications

  • Kim, Jung-Dae;Park, Mun-Yang;Kang, Jin-Yeong;Lee, Sang-Yong;Koo, Jin-Gun;Nam, Kee-Soo
    • ETRI Journal
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    • 제20권1호
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    • pp.37-45
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    • 1998
  • Reduced surface field lateral double-diffused MOS transistor for the driving circuits of plasma display panel and field emission display in the 120V region have been integrated for the first time into a low-voltage $1.2{\mu}m$ analog CMOS process using p-type bulk silicon. This method of integration provides an excellent way of achieving both high power and low voltage functions on the same chip; it reduces the number of mask layers double-diffused MOS transistor with a drift length of $6.0{\mu}m$ and a breakdown voltage greater than 150V was self-isolated to the low voltage CMOS ICs. The measured specific on-resistance of the lateral double-diffused MOS in $4.8m{\Omega}{\cdot}cm^2$ at a gate voltage of 5V.

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External Cavity Lasers Composed of Higher Order Gratings and SLDs Integrated on PLC Platform

  • Shin, Jang-Uk;Oh, Su-Hwan;Park, Yoon-Jung;Park, Sang-Ho;Han, Young-Tak;Sung, Hee-Kyung;Oh, Kwang-Ryong
    • ETRI Journal
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    • 제29권4호
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    • pp.452-456
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    • 2007
  • Very compact 4-channel 200-GHz-spacing external cavity lasers (ECLs) were fabricated by hybrid integration of reflection gratings and superluminescent laser diodes on a planar lightwave circuit chip. The fifth-order gratings as reflection gratings were formed using a conventional contact-mask photo-lithography process to achieve low-cost fabrication. The lasing wavelength of the fabricated ECLs matched the ITU grid with an accuracy of ${\pm}0.1$ nm, and optical powers were more than 0.4 mW at the injection current of 80 mA for all channels. The ECLs showed single mode operations with more than 30 dB side lobe suppression.

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상용 Solid Modeler를 이용한 볼 엔드밀 가공의 절삭력 예측 (Prediction of Cutting Force in Ball-end mill Cutting using the Commercial Solid Modeler)

  • 이재종;박찬훈;최종근;박홍석
    • 한국정밀공학회:학술대회논문집
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    • 한국정밀공학회 1997년도 추계학술대회 논문집
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    • pp.197-200
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    • 1997
  • In the metal cutting, machining accuracies had affected by tool deflection that had been generated by acting cutting force on the cutting edges. Generally, the CAD/CAM and a solid modeler had used for the simulation of cutting process only. Some NC codes for metal cutting have been generated by these simulation results. But, machining errors that had generated by the tool deflection has not solved using these system. In this study, determination algorithm for integration zone has been studied using the commercial solid modeler. The tool deflection error has calculated by the integration zone between the small chip and the cutting edges.

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High Performance On-Chip Integrable Inductor for RF Applications

  • Lee, J.Y.;Kim, J.H.;Kim, M.J.;Moon, S.S.;Kim, I.H.;Lee, Y.H.;Yook, Jong-Gwan;Kukjin Chun
    • 반도체디스플레이기술학회지
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    • 제2권1호
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    • pp.11-14
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    • 2003
  • The high Q(quality factor) suspended spiral inductors were fabricated on the silicon substrate by 3D surface micromachined process. The integration of 2.4GHz VCO has been performed by fabricating suspended spiral inductor of the top of CMOS VCO circuit. The phase noise of VCO integrated MEMS inductor is 93.5 dBc/Hz at 100kHz of offset frequency.

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RFID tag 집적화를 위한 $0.18{\mu}m$ 표준 CMOS 공정을 이용한 쇼트키 다이오드의 제작 (Fabrication of Schottky diodes for RFID tag integration using Standard $0.18{\mu}m$ CMOS process)

  • 심동식;민영훈
    • 대한전자공학회:학술대회논문집
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    • 대한전자공학회 2006년도 하계종합학술대회
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    • pp.591-592
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    • 2006
  • Schottky diodes for Radio-frequency identification (RFID) tag integration on chip were designed and fabricated using Samsung electronics System LSI standard $0.18{\mu}m$ CMOS process. Schottky diodes were designed as interdigitated fingers array by CMOS layout design rule. 64 types of Schottky diode were designed and fabricated with the variation of finger width, length and numbers with a $0.6{\mu}m$ guard ring enclosing n-well. Titanium was used as Schottky contact metal to lower the Schottky barrier height. Barrier height of the fabricated Schottky diode was 0.57eV. DC current - voltage measurements showed that the fabricated Schottky diode had a good rectifying properties with a breakdown voltage of -9.15 V and a threshold voltage of 0.25 V.

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Enhancement of heat exchange using On-chip engineered heat sinks

  • Chong, Yonuk
    • 한국초전도ㆍ저온공학회논문지
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    • 제19권4호
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    • pp.18-21
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    • 2017
  • We report a method for improving heat exchange between cryo-cooled large-power-dissipation devices and liquid cryogen. Micro-machined monolithic heat sinks were fabricated on a high integration density superconducting Josephson device, and studied for their effect on cooling the device. The monolithic heat sink showed a significant enhancement of cooling capability, which markedly improved the device operation under large dc- and microwave power dissipation. The detailed mechanism of the enhancement still needs further modeling and experiments in order to optimize the design of the heat sink.

RF CMOS 기술을 이용한 이동통신용 부품기술 동향

  • 김천수
    • 한국전자파학회지:전자파기술
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    • 제12권3호
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    • pp.49-59
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    • 2001
  • Wireless communication systems will be one of the biggest drivers of semiconductor products over the next decade. Global Positioning System (GPS) and Blue-tooth, HomeRF, and Wireless-LNA system are just a few of RF-module candidate awaiting integration into next generation mobile phone. Motivated by the growing needs for lowcost and multi-band/multi-function single chip wireless transceivers, CMOS technology has been recognized as a most promising candidate for the implementation of the future wireless communication systems. This paper presents recent developments in RF CMOS technology so far, much of them have been developed in ETRI, and from them forecasts technology trends in the near future.

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