• Journal of Welding and Joining
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• v.17 no.1
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• pp.124-132
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• 1999

Thermal fatigue strength of the solder joints is the most critical issue for TSOP(Thin Small Outline Package) because the leads of this package are extremely short and thermal deformation cannot be absorbed by the deflection of the lead. And the TSOP body can be subject to early fatigue failures in thermal cycle environments. This paper was discussed distribution of thermal stresses at near the joint between silicon chip and die pad and investigated their reliability of solder joints of TSOP with 42 alloy clad lead frame on printed circuit board through FEM and 3 different thermal cycling tests. It has been found that the stress concentration around the encapsulated edge structure for internal crack between the silicon chip and Cu alloy die pad. And using 42 alloy clad, The reliability of TSOP body was improved. In case of using 42 alloy clad die pad(t=0.03mm). $$\sigma$_{VMmax}$ is 69Mpa. It is showed that 15% improvement of the strength in the TSOP body in comparison with using Cu alloy die pad $($\sigma$_{VMmax}$=81MPa). In solder joint of TSOP, the maximum equivalent plastic strain and Von Mises stress concentrate on the heel of solder fillet and crack was initiated in it's region and propagated through the interface between lead and solder. Finally, the modified Manson-Coffin equation and relationship of the ratio of $N_{f}$ to nest(η) and cumulative fracture probability(f) with respect to the deviations of the 50% fracture probability life $(N_{f 50%})$ were achieved.

• Journal of the Microelectronics and Packaging Society
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• v.14 no.4
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• pp.9-14
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• 2007

In this study, the thermal reliability on flip chip package with non-conductive pastes (NCPs) was evaluated under accelerated conditions. As the number of thermal shock cycle and the dwell time of temperature and humidity condition increased, the electrical resistance of the flip chip package with NCPs increased. These phenomenon was occurred by the crack between Au bump and Au bump and the delamination between chip or substrate and NCPs during the thermal shock and temperature and humidity tests. And the variation of electrical resistance during temperature and humidity test was larger than that during thermal shock test. Therefore it was identified that the flip chip package with NCPs was sensitive to environment with moisture.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.16 no.9
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• pp.5748-5755
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• 2015

Scribing is cutting process to determine production amount and characteristic of LED chip. So it is an important process for fabrication of LED chip. Mechanical process and conventional scribing process with laser source has several problems such as thermal deformation, decreasing of material strength and limitation of cutting region. To solve these problems, internal laser scribing process that generates void in wafer and derives self-crack has been researched. However, studies of sapphire wafer cutting by internal laser scribing process for fabrication of LED chip are still insufficient. In this paper, cutting parameters were determined to apply internal laser scribing process for sapphire wafer for fabrication of LED chip. Then, foundation of cutting condition was established to set up internal laser scribing system through investigation of cutting characteristics by several experiments.

• Journal of the Institute of Convergence Signal Processing
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• v.10 no.2
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• pp.120-126
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• 2009

There are many different types of surface defects on semiconductor Integrated Chips (IC's) caused by various factors during manufacturing process, such as cracks, foreign materials, chip-outs, chips, and voids. These defects must be detected and classified by an inspection system for productivity improvement and effective process control. Among defects, in particular, foreign materials and chips are the most difficult ones to classify accurately. A vision system composed of a carefully designed optical system and a processing algorithm is proposed to detect and classify the defects on QFN(Quad Flat No-leads) packages. The processing algorithm uses features derived from the defect's position and brightness value in the Maximum Likelihood classifier and the optical system is designed to effectively extract the features used in the classifier. In experiments we confirm that this method gives more effective result in classifying foreign materials and chips.

• Journal of the Microelectronics and Packaging Society
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• v.7 no.4
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• pp.31-35
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• 2000

The stress state developed in a thin adhesive layer bonded between the semiconductor chip and the leadframe and subjected to a shear loading is investigated. The boundary element method (BEM) is employed to investigate the behavior of interface stresses. Within the context of a linear elastic theory, a stress singularity of type $\gamma^{\lambda=1}$(0<1<1) exists at the point where the interface between one of the rigid adherends and the adhesive layer intersects the free surface. Such singularity might lead to edge crack or delamination.

• Proceedings of the Korean Society of Precision Engineering Conference
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• 1993.10a
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• pp.83-88
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• 1993

Recently, the analysis of microcutting with submicrometer depth of cut is tried to get a more high quality surface product, but to get a valuable result another method instead of conventional finite element method must be considered because finite elment method is impossible for a very small focused region and mesh size. As the altermative method, Molecular Dynamics or Statics is suggested and acceoted in the field of microcutting, indentation and crack propagation. In this paper using Molecuar Dynamics simulation, the phenomena of microcutting with subnanometer chip thickness is studied and the cutting mechanism for tool edge configuration is evaluated. As the result of simulation the atomistic chip formation is achieved.

• Korean Journal of Materials Research
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• v.15 no.3
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• pp.183-188
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• 2005

It was studied in this article how the flexural strength of bare silicon chips is influenced by adopting dual wafer back-lapping process. The experimental results showed that an additional finishing process after the conventional grinding process improves the flexural strength of bare chips by more than 2-fold. In particular, this work showed that the proper removal of the grinding marks$(Ra=0.1\;{\mu}m)$existing on the wafer back-surface resulting from the grinding process significantly contiributes to the enhancement of chip strength.

• Journal of the Korean Society of Manufacturing Process Engineers
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• v.11 no.3
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• pp.19-23
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• 2012

Glassy carbon is widely used for high temperature melting process such as quartz due to its thermal stability. For utilizing Classy Carbon to glass mold press(GMP) optical lens, brittleness of Glassy Carbon is main obstacle of ultraprecision machining. Thus authors investigated ductile machining of Glassy Carbon adopting turning and grinding process respectively. From the experiments, ultraprecision turning surfaces resulted brittle crack in all machining conditions and ultraprecision grinding surfaces showed semi-ductile mode in small undeformed chip thickness conditions.

• Journal of Mechanical Science and Technology
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• v.18 no.3
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• pp.357-369
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• 2004

The purposes of the paper are to analyze the fracture phenomenon by delamination and cracking when the encapsulant of plastic IC package with polyimide coating shows viscoelastic behavior under hygrothermal loading in the IR soldering process and to suggest more reliable design conditions by the approaches of stress analysis and fracture mechanics. The model is the plastic SOJ package with the polyimide coating surrounding chip and dimpled diepad. On the package without cracks, the optimum position and thickness of polyimide coating to decrease the maximum differences of strains at the bonding surfaces of parts of the package are studied. For the model delaminated fully between the chip and the dimpled diepad, C(t)-integral values are calculated for the various design variables. Finally, the optimal values of design variables to depress the delamination and crack growth in the plastic IC package are obtained.

• Journal of the Korean Society for Precision Engineering
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• v.12 no.4
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• pp.135-142
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• 1995

Recently, the analysis of microcutting with submicrometer depth of cut is tried to get a more high quality surface product, but to get a valuable result another method instead of conventional finite element method must be considered because finite element method is impossible for a very small focused region and mesh size. As the alternative method, Molecular Dynamics or Statics is suggested and accepted in the field of microcutting, indentation and crack propagation. In this paper using Molecular Dynamics simulation, the phenomena of microcutting with subnanometer chip thickness is studied and the cutting mechanism for tool edge configuration is evaluated. As the result of simulation the atomistic chip formation is achieved.