• Journal of the Microelectronics and Packaging Society
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• v.15 no.2
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• pp.7-15
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• 2008

In this paper, the Chip-On-Flex (COF) assembly process using anisotropic conductive films (ACFs) was investigated and the reliability of COF assemblies using ACFs was evaluated. Thermo-mechanical properties of ACFs such as coefficient of thermal expansion (CTE), storage modulus (E'), and glass transition temperature $(T_g)$ were measured to investigate the effects of ACF material properties on the reliability of COF assemblies using ACFs. In addition, the bonding conditions for COF assemblies using ACFs such as time, temperature, and pressure were optimized. After the COF assemblies using ACFs were fabricated with optimized bonding conditions, reliability tests were then carried out. According to the reliability test results, COF assemblies using the ACF which had lower CTE and higher $T_g$ showed better thermal cycling reliability. Consequently, thermo-mechanical properties of ACFs, especially $T_g$, should be improved for high thermal cycling reliability of COF assemblies using ACFs for compact camera module (CCM) applications.

• Korean Journal of Materials Research
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• v.19 no.11
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• pp.625-630
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• 2009

Embedding of active devices in a printed circuit board has increasingly been adopted as a future electronic technology due to its promotion of high density, high speed and high performance. One responsible technology is to embedded active device into a dielectric substrate with a build-up process, for example a chipin-substrate (CiS) structure. In this study, desmear treatment was performed before Cu metallization on an FR-4 surface in order to improve interfacial adhesion between electroless-plated Cu and FR-4 substrate in Cu via structures in CiS systems. Surface analyses using atomic force microscopy and x-ray photoemission spectroscopy were systematically performed to understand the fundamental adhesion mechanism; results were correlated with peel strength measured by a 90o peel test. Interfacial bonding mechanism between electrolessplated Cu and FR-4 substrate seems to be dominated by a chemical bonding effect resulting from the selective activation of chemical bonding between carbon and oxygen through a rearrangement of C-C bonding rather than from a mechanical interlocking effect. In fact, desmear wet treatment could result in extensive degradation of FR-4 cohesive strength when compared to dry surface-treated Cu/FR-4 structures.

• Proceedings of the KIEE Conference
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• 2005.11a
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• pp.30-32
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• 2005

This paper reports on an LTCC-based packaging method using Au/Sn eutectic bonding process for RF MEMS applications. The proposed packaging structure was realized by a micromachining technology. An LTCC substrate consists of metal filled vertical via feedthroughs for electrical interconnection and Au/Sn sealing rim for eutectic bonding. The LTCC capping substrate and the glass bottom substrate were aligned and bonded together by a flip-chip bonding technology. From now on, shear strength and He leak rate will be measured then the fabricated package will be compared with the LTCC package using BCB adhesive bonding method which has been researched in our previous work.

• ETRI Journal
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• v.41 no.3
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• pp.396-407
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• 2019

Laser-assisted bonding (LAB) is an advanced technology in which a homogenized laser beam is selectively applied to a chip. Previous researches have demonstrated the feasibility of using a single-tier LAB process for 3D through-silicon via (TSV) integration with nonconductive paste (NCP), where each TSV die is bonded one at a time. A collective LAB process, where several TSV dies can be stacked simultaneously, is developed to improve the productivity while maintaining the reliability of the solder joints. A single-tier LAB process for 3D TSV integration with NCP is introduced for two different values of laser power, namely 100 W and 150 W. For the 100 W case, a maximum of three dies can be collectively stacked, whereas for the 150 W case, a total of six tiers can be simultaneously bonded. For the 100 W case, the intermetallic compound microstructure is a typical Cu-Sn phase system, whereas for the 150 W case, it is asymmetrical owing to a thermogradient across the solder joint. The collective LAB process can be realized through proper design of the bonding parameters such as laser power, time, and number of stacked dies.

• 한국정보디스플레이학회:학술대회논문집
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• 2003.07a
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• pp.1005-1008
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• 2003

We report a new FCOG (flip chip on glass) technique using solder bumps for display packaging applications. The In and Sn solder bumps of 40 ${\mu}m$ pitches were formed on Si and glass substrate. The In and Sn bumps were bonded at 125 at the pressure of 3 mN/bump. The metallurgical bonding was confirmed using cross-sectional SEM. The contact resistance of the solder joint was 65 $m{\Omega}$ which was much lower than that of the joint made using the conventional ACF bonding technique. We demonstrate that the new COG technique using solder bump to bump direct bonding can be applied to advanced LCDs that lead to require higher quality, better resolution, and lower power consumption.

• Proceedings of the Korean Society of Precision Engineering Conference
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• 2010.05a
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• pp.671-672
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• 2010

• Proceedings of the Korean Society of Precision Engineering Conference
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• 2009.06a
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• pp.1049-1050
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• 2009

• Proceedings of the Korean Society of Precision Engineering Conference
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• 2009.10a
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• pp.705-706
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• 2009

• Proceedings of the Korean Society for Noise and Vibration Engineering Conference
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• 2011.10a
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• pp.289-290
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• 2011

• Journal of the Korean Society of Manufacturing Technology Engineers
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• v.22 no.3_1spc
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• pp.504-508
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• 2013

This paper describes in detail the life prediction models and simulations of thermal fatigue under different mold compounds and chip sizes for wafer-level embedded SiP. Three-dimensional finite element models are built to simulate the viscoplastic behaviors for various mold compounds and chip sizes. In particular, the bonding parts between a mold and silicon nitride (Si3N4) are carefully modeled, and the strain distributions are studied. Three different chip sizes are used, and the effects of the mold compounds are observed. Through the numerical studies, it is found that type-C, which has a relatively lower Young's modulus and higher CTE, has a better fatigue life than the other mold compounds. In addition, the $4{\times}4$ chip has a shorter life than the $6{\times}6$ and $8{\times}8$ chips.