• Journal of the Institute of Electronics Engineers of Korea TC
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• v.44 no.3 s.357
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• pp.61-67
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• 2007

In Reed Solomon decoder, when there are more than 4 error symbols, we usually use Chien search machine to find those error positions. In this case, classical method requires complex and relatively slow digital circuitry to implement it. In this paper we propose New fast and cost effective Chien search machine design method using Galois Subfield transformation. Example is given to show the method is working well. This new design can be applied to the case where there are more than 5 symbol errors in the Reed-Solomon code word.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.49 no.5
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• pp.15-20
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• 2012

In this paper, we show new method to find the error locations of received Reed-Solomon code word. New design is much faster and has much simpler logic circuit than the former design method. This optimization was possible by very simplified square/$X^4$ calculating circuit, parallel processing and not using the very complex Divider. The Reed Solomon decoder using this new Chien Machine can be applicated for data protection of almost all digital communication and consumer electronic devices.