• Proceedings of the Korean Society of Precision Engineering Conference
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• 2003.10a
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• pp.88-88
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• 2003

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2004.11a
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• pp.731-734
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• 2004

As the integrated circuit device shrinks to the smaller dimension, the chemical mechanical polishing (CMP) process was required for the global planarization of inter-metal dielectric(IMD) layer with free-defect. Polishing pads play a key role in CMP, which has been recognized as a critical step to improve the topography of wafers for semiconductor fabrication. It is investigated the performance of $SiO_2-CMP$ process using commercial silica slurry as a pad conditioning temperature increased after CMP process. This study also showed the change of SEM images in the pore geometry on the CMP pad surface after use with a different pad conditioning temperature.

• Proceedings of the Materials Research Society of Korea Conference
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• 2002.05a
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• pp.56-56
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• 2002

• Proceedings of the Korean Society of Tribologists and Lubrication Engineers Conference
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• 2004.11a
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• pp.330-330
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• 2004

• Proceedings of the Korean Society of Tribologists and Lubrication Engineers Conference
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• 2003.11a
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• pp.402-402
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• 2003

• Transactions on Electrical and Electronic Materials
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• v.12 no.2
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• pp.56-59
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• 2011

The characterization of the chemical mechanical polishing (CMP) process for undensified phophosilicate glass (PSG) film is reported using design of experiments (DOE). DOE has been used by experimenters to understand the relationship between the input variables and responses of interest in a simple and efficient way, and it typically is beneficial for determining the appropriatesize of experiments with multiple process variables and making statistical inferences for the responses of interest. The equipment controllable parameters used to operate the machine consist of the down force of the wafer carrier, pressure on the back side wafer, table and spindle speeds (SS), slurry flow (SF) rate, pad condition, etc. None of these are independent ofeach other and, thus, the interaction between the parameters also needs to be understoodfor improved process characterization in CMP. In this study, we selected the five controllable equipment parameters the most recommendedby process engineers, viz. the down force (DF), back pressure (BP), table speed (TS), SS, and SF, for the characterization of the CMP process with respect to the material removal rate and film uniformity in percentage terms. The polished material is undensified PSG which is widely used for the plananization of multi-layered metal interconnects. By statistical modeling and the analysis of the metrology data acquired from a series of $2^{5-1}$ fractional factorial designs with two center points, we showed that the DF, BP and TS have the greatest effect on both the removal rate and film uniformity, as expected. It is revealed that the film uniformity of the polished PSG film contains two and three-way interactions. Therefore, one can easily infer that process control based on a better understanding of the process is the key to success in current semiconductor manufacturing, in which the size of the wafer is approaching 300 mm and is scheduled to continuously increase up to 450 mm in or slightly after 2012.

• Transactions on Electrical and Electronic Materials
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• v.12 no.3
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• pp.115-118
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• 2011

Process characterization of the chemical mechanical polishing (CMP) process for undensified phosphosilicate glass (PSG) film is reported using design of experiments (DOE). DOE has been addressed to experimenters to understand the relationship between input variables and responses of interest in a simple and efficient way. It is typically beneficial for determining the adequate size of experiments with multiple process variables and making statistical inferences for the responses of interests. Equipment controllable parameters to operate the machine include the down force (DF) of the wafer carrier, pressure on the backside of the wafer, table and spindle speed (SS), slurry flow rate, and pad condition. None of them is independent; thus, the interaction between parameters also needs to be indicated to improve process characterization in CMP. In this paper, we have selected the five controllable equipment parameters, such as DF, back pressure (BP), table speed (TS), SS, and slurry flow (SF), most process engineers recommend to characterize the CMP process with respect to material removal rate (RR) and film uniformity as a percentage. The polished material is undensified PSG. PSG is widely used for the plananization in multi-layered metal interconnects. We identify the main effect of DF, BP, and TS on both RR and film uniformity, as expected, by the statistical modeling and analysis on the metrology data acquired from a series of $2^{5-1}$ fractional factorial design with two center points. This revealed the film uniformity of the polished PSG film contains two and three-way interactions. Therefore, one can easily infer that the process control based on better understanding of the process is the key to success in semiconductor manufacturing, typically when the wafer size reaches 300 mm and is continuously scheduled to expand up to 450 mm in or little after 2012.

• Transactions on Electrical and Electronic Materials
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• v.8 no.2
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• pp.53-57
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• 2007

In this study, a novel slurry containing ceria as the abrasive particles was analyzed in terms of its frictional, thermal and kinetic attributes for interlayer dielectric (ILD) CMP application. The novel slurry was used to polish 200-mm blanket ILD wafers on an $IC1000_{TM}$ K-groove pad with in-situ conditioning. Polishing pressures ranged from 1 to 5 PSI and the sliding velocity ranged from 0.5 to 1.5 m/s. Shear force and pad temperature were measured in real time during the polishing process. The frictional analysis indicated that boundary lubrication was the dominant tribological mechanism. The measured average pad leading edge temperature increased from 26.4 to $38.4\;^{\circ}C$ with the increase in polishing power. The ILD removal rate also increased with the polishing power, ranging from 400 to 4000 A/min. The ILD removal rate deviated from Prestonian behavior at the highest $p{\times}V$ polishing condition and exhibited a strong correlation with the measured average pad leading edge temperature. A modified two-step Langmuir-Hinshelwood kinetic model was used to simulate the ILD removal rate. In this model, transient flash heating temperature is assumed to dominate the chemical reaction temperature. The model successfully captured the variable removal rate behavior at the highest $p{\times}V$ polishing condition and indicates that the polishing process was mechanical limited in the low $p{\times}V$ polishing region and became chemically and mechanically balanced with increasing polishing power.

• Transactions of the Korean Society of Mechanical Engineers A
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• v.27 no.12
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• pp.2110-2117
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• 2003

A physics-based material removal model in various scales is described and a feature scale simulation for a chemical mechanical polishing (CMP) process is performed in this work. Three different scales are considered in this model, i.e., abrasive particle scale, asperity scale and wafer scale. The abrasive particle and the asperity scales are combined together and then homogenized to result in force balance conditions to be satisfied in the wafer scale using an extended Greenwood-Williamson and Whitehouse-Archard statistical model that takes into consideration the joint distribution of asperity heights and asperity tip radii. The final computation is made to evaluate the material removal rate in wafer scale and a computer simulation is performed for detailed surface profile variations on a representative feature. The results show the dependence of the material removal rate on the joint distribution, applied external pressure, relative velocity, and other operating conditions and design parameters.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2001.11b
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• pp.185-188
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• 2001

Chemical mechanical polishing(CMP) process is widely used for global planarization of inter-metal dielectric (IMD) layer and inter-layer dielectric (ILD) for deep sub-micron technology. However, as the IMD and ILD layer gets thinner, defects such as micro-scratch lead to severe circuit failure, which affect yield. In this paper, for the improvement of CMP process, deionized water (DIW) pressure, purified $N_2 \; (PN_2)$ gas, slurry filter and high spray bar were installed. Our experimental results show that DIW pressure and $PN_2$ gas factors were not related with removal rate, but edge hot-spot of patterned wafer had a serious relation. Also, the filter installation in CMP polisher could reduce defects after CMP process, it is shown that slurry filter plays an important role in determining consumable pad lifetime. The filter lifetime is dominated by the defects. However, the slurry filter is impossible to prevent defect-causing particles perfectly. Thus, we suggest that it is necessary to install the high spray bar of de-ionized water (DIW) with high pressure, to overcome the weak-point of slurry filter. Finally, we could expect the improvements of throughput, yield and stability in the ULSI fabrication process.