• 한국정보디스플레이학회:학술대회논문집
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• 2002.08a
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• pp.605-608
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• 2002

This paper proposes a real-time wall charge measurement circuit for three-electrode AC PDP. It includes a charge-compensation network, current-integrating capacitors, initializing switches, and an op-amp. With this equipment, we measure the wall charge variations for the effects of sustain voltage, sustain pulse width, sustain frequency, and neighboring cells.

• Journal of Information Display
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• v.13 no.3
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• pp.97-100
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• 2012

We have conducted two kinds of the so-called charge-compensated aliovalent element substitutions to control the photoluminescence properties of $NaAlSiO_4:Eu^{2+}$ with a special focus on the enhancement of the excitation intensity at 400 nm. The aliovalent element substitutions include cation-cation and cation-anion co-substitutions according to the general formulas $Na_{1-x}M_xAl_{1+x}Si_{1-x}O_4:Eu^{2+}$ and $Na_{1-x}M_xAlSiO_{4-x}N_x:Eu^{2+}$ (M = $Mg^{2+}$, $Ca^{2+}$, and $Sr^{2+}$), respectively. The increase in the relative excitation intensity at 400 nm has been achieved in both types of the co-substitutions. Thus, the present research has demonstrated the effectiveness of the charge-compensated element substitution.

• Journal of Electrical Engineering and Technology
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• v.7 no.6
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• pp.834-844
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• 2012

Nonlinear electronic loads draw harmonic currents from the power grids that can cause energy loss, miss-operation of power equipment, and other serious problems in the power grids. This paper proposes a harmonic compensation method using multiple distributed resources (DRs) such as small distributed generators (DGs) and battery energy storage systems (BESSs) that are integrated to the power grids through power inverters. For harmonic compensation, DRs should inject additional apparent power to the grids so that certain DRs, especially operated in proximity to their rated power, may possibly reach their maximum current limits. Therefore, intelligent coordination methods of multiple DRs are required for efficient harmonic current compensation considering the power margins of DRs, energy cost, and the battery state-of-charge. The proposed method is based on fuzzy multi-objective optimization so that DRs can cooperate with other DRs to eliminate harmonic currents with optimizing mutually conflicting multi-objectives.

• Journal of Electrical Engineering and Technology
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• v.10 no.5
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• pp.1983-1988
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• 2015

This paper proposes the enhanced application of superconducting magnetic energy storage (SMES) for the effective compensation of power fluctuations based on the interleaving technique. With increases in demand for renewable energy based photovoltaic (PV) generation system, the output power fluctuations from PV generation system due to sudden changes in environmental conditions can cause serious problems such as grid voltage and frequency variations. To solve this problem, the SMES system is applied with its superior characteristics with respect to high power density, fast response for charge and discharge operations, system efficiency, etc. In particular, the compensation capability is effectively improved by the proposed interleaving technique based on its parallel structure. The dynamic performance of the system designed using the proposed method is evaluated with several case studies through time-domain simulations.

• Proceedings of the Korea Institute of Applied Superconductivity and Cryogenics Conference
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• 2000.02a
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• pp.185-188
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• 2000

The voltage induced in the superconducting background magnet system is analyzed according to the calculation of self inductance and mutual inductance. The voltage induced by blip and compensation coils of the background magnet system is about 6.4V. In order to charge the main background magnet, the power supply must provide the minimum voltage of 1.1 kV. the compensation coils have an influence on the field distribution. The compensation coils result in the decreasing center field about 2.67%. It can remarkably decrease the ac losses and the voltage on the current leads of the background magnet.

• JSTS:Journal of Semiconductor Technology and Science
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• v.7 no.1
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• pp.11-19
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• 2007

This paper presents two novel compensation circuits for leakage current and power supply noise (PSN) in phase locked loop (PLL) using a nanometer CMOS technology. The leakage compensation circuit reduces the leakage current of the charge pump circuit which becomes more serious problem due to the thin gate oxide and small threshold voltage in nanometer CMOS technology and the PSN compensation circuit decreases the effect of power supply variation on the output frequency of VCO. The PLL design is based on a 32nm predictive CMOS technology and uses a 0.9V power supply voltage. The simulation results show that the proposed PLL achieves a 88% jitter reduction at 440MHz output frequency compared to the PLL without leakage compensator and its output frequency drift is little to 20% power supply voltage variations. The PLL has an output frequency range of $40M{\sim}725MHz$ with a multiplication range of 11023, and the RMS and peak-to-peak jitter are 5ps and 42.7ps, respectively.

• The Korean Society of Law and Medicine
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• v.13 no.1
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• pp.295-329
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• 2012

A medical malpractice case requires special legal protection, considering its characteristics, such as seriousness and long term effects of its damages, medical information asymmetry between practitioners and patients, and difficulties in realization of liability. Taking the points above into consideration, Medical Malpractice Arbitration Act of 2012(MAA) has legislative intent to protect the rights of the injured from medical malpractice, while protecting the stability of medical practice by providing arbitration as an alternative dispute resolution. However, constitutional review is required for one new scheme of compensation for medical injuries during delivery, which is implemented in MAA of 2012, especially with regard to freedom to exercise occupation, property, equality under the Constitution. Two important aspects are 1. according to the law, absolute liability applies to compensation for damages during delivery without negligence of practitioners; and 2. the practitioner bears some portion of the cost, 30% in the law above. This article aims to analyze this new institution in various aspects of the Constitution, and, as a result, it does not comply with constitutional criteria.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.45 no.1
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• pp.56-63
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• 2008

This paper describes a 12 bit 1GS/s current mode segmented DAC for WCDMA communication. The proposed circuit in this paper employes segmented structure which consists of 4bit binary weighted structure in the LSB and 4bit thermometer decoder structure in the mSB and MSB. The proposed DAC uses delay time compensation circuits in order to suppress performance decline by delay time in segmented structure. The delay time compensation circuit comprises of phase frequency detector, charge pump, and control circuits, so that suppress delay time by binary weighted structure and thermometer decoder structure. The proposed DAC uses CMOS $0.18{\mu}m$ 1-poly 6-metal n-well process, and measured INL/DNL are below ${\pm}0.93LSB/{\pm}0.62LSB$. SFDR is approximately 60dB and SNDR is 51dB at 1MHz input frequency. Single DAC's power consumption is 46.2mW.

• Journal of the Institute of Electronics Engineers of Korea SC
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• v.46 no.1
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• pp.63-67
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• 2009

Current mismatch in a charge pump causes degradation in spectral purity of the phase locked loops(PLLs), such as reference spurs. The current mismatch can be reduced by increasing the output resistance of the charge pump, as in a cascoded output stage. However as the supply voltage is lowered, it is hard to stack transistors. In this paper, a new method for reducing the current mismatch is proposed. The proposed method is based on a feed-forward compensation for the channel length modulation effect of the output stage. The new method has been demonstrated through simulations on typical $0.18{\mu}m$ CMOS circuits.

• Journal of the Semiconductor & Display Technology
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• v.22 no.4
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• pp.161-165
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• 2023

This paper designed a voltage feedback driving circuit to compensate for the characteristic deviation of the Active Matrix Organic Light Emitting Diode driving Thin Film Transistor. This paper describes a stable and fast circuit by applying charge sharing and polar stabilization methods. A 12-inch Organic Light Emitting Diode with a Double Wide Ultra eXtended Graphics Array resolution creates a screen distortion problem for line parasitism, and charge sharing and polar stabilization structures were applied to solve the problem. By applying Charge Sharing, all data lines are shorted at the same time and quickly positioned as the average voltage to advance the compensated change time of the gate voltage in the next operation period. A buffer circuit and a current pass circuit were added to lower the Amplifier resistance connected to the line as a polar stabilization method. The advantage of suppressing the Ringing of the driving Thin Film Transistor can be obtained by increasing the stability. As a result, a circuit was designed to supply a stable current to the Organic Light Emitting Diode even if the characteristic deviation of the driving Thin Film Transistor occurs.