• The Journal of Korean Institute of Communications and Information Sciences
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• v.39B no.7
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• pp.440-448
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• 2014

A $4{\times}10$ Gb/s Transimpedance Amplifier (TIA) array is implemented in $0.13{\mu}m$ CMOS process technology, which will be used in the receiver of TWDM-PON system. A technology for bandwidth enhancement of a given $4{\times}10$ Gb/s TIA presented under inductor peaking technology and a single 1.2V power supply based low voltage design technology. It achieves 3 dB bandwidth of 7 GHz in the presence of a 0.5 pF photodiode capacitance. The trans-resistance gain is $50dB{\Omega}$, while 48 mW/ 1channel from a 1.2 V supply. The input sensitivity of the TIA is -27 dBm. The chip size is $1.9mm{\times}2.2mm$.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.49 no.1
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• pp.68-72
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• 2012

In this paper, highly linear power amplifier using bandpass filter based on metamaterial and Composite Right- / Left-Handed (CRLH) structure is proposed. The proposed bandpass filter consist of the series capacitor, series microstrip line and the parallel inductor, parallel microstrip line. The insertion loss is minimized at operation frequency and the $2^{nd}$ harmonic is suppressed by the bandpass filter using the CRLH structure. And we improved the Adjacent Channel Leakage Ratio (ACLR) using the characteristic of the proposed bandpass filter. At 2.14 GHz, we have obtained the output power of 38.83 dBm, the $2^{nd}$ harmonic of .61.33 dBc, the $3^{rd}$ IMD of .54.67 dBc, and ACLR of .51.33 dBc at 5 MHz offset, -56.50 dBc at 10 MHz offset, respectively.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2010.05a
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• pp.490-492
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• 2010

A swing level controlled voltage-mode transmitter is proposed to support a stub series-terminated logic channel with center-tapped termination. This transmitter provides a swing level control to support the diagnostic mode and improve the signal integrity in the absence of the destination termination. By using the variable parallel termination, the proposed transmitter maintains the constant output impedance of the source termination while the swing level is controlled. Also, the series termination using an external resistor is used to reduce the impedance mismatch effect due to the parasitic components of the capacitor and inductor. To verify the proposed transmitter, the voltage-mode driver, which provides eight swing levels with the constant output impedance of about $50{\Omega}$, was implemented using a 70nm 1-poly 3-metal DRAM process with a 1.5V supply. The jitter reduction of 54% was measured with the swing level controlled voltage-mode driver in the absence of the destination termination at 1.6-Gb/s.