• Proceedings of the KIEE Conference
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• 2008.07a
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• pp.928-929
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• 2008

A dc/dc power conversion system using multi stage capacitor is proposed in this paper. The proposed new type converter is designed from high efficiency dc/dc converter with fixed boost ratio and variable voltage converter. The tests have been done using PSIM computer simulation to confirm the analysis and control concept.

• Proceedings of the IEEK Conference
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• 2001.06e
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• pp.241-244
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• 2001

This paper proposes a nonlinear impedance circuit composed by diodes and inductors or capacitors. This circuit needs no control circuits and switches, and the impedance value is changed by the polarity of current or voltage, This paper presents one of these applications to improve the input current of capacitor input diode rectifiers. The rectifier using the nonlinear impedance circuit id constructed with four diodes and four capacitors in addition to the conventional rectifiers, that is it has eight diodes and five capacitors, including a DC link capacitor. It makes harmonic components of the input current reduce and the power factor improve. A circuit design method is shown by experimentation and confirmed simulation. It explained that compared conventional pulse-width modulated (PWM)inverter with half pulse-width modulated (HPWM) inverter. Proposed HPWM inverter eliminated dead-time by lowering switching loss and holding over-shooting.

• Proceedings of the KIPE Conference
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• 2015.07a
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• pp.189-190
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• 2015

This paper investigates an economic and highly efficient power converter topology and its modulation scheme for 60kW rapid EV charger system. The target system consists of three-phase three-switch buck-type rectifier topology. A new Carrier Based PWM scheme along with its simple implementation using logic gates is introduced in this paper. This PWM scheme replaces the diode rectifier equivalent switching state with an active switching state producing the effectively same current flowing path. As a result, the distortion of input current during the polarity reversal of capacitor line voltage can be mitigated. The proposed modulation technique is confirmed through simulation verification. The proposed modulation technique and its implementation scheme can expand the operation range of the three-phase three-switch buck-type rectifier having ac input and capacitor ripple current of high quality.

• Proceedings of the KIEE Conference
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• 1993.07b
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• pp.731-735
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• 1993

When induction motor is driven with a load commutated inverter, the output part of the inverter must be capacitive. But, in order to be a good load commutation at the low speed range, very large capacitor or force commutated circuit must be used regarding the capacity of motor. This paper proposed the force commutated circuit for driving the motor in case of the installation of capacitor which can be capable of load commutation at the rating speed. The force commutated circuit is operated by the LC resonant circuit, auxiliary source and SCR, and also composed of the commutation circuit which control the interval of the inverse voltage across the inverter.

• Proceedings of the KIEE Conference
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• 2005.10c
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• pp.110-113
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• 2005

This paper proposes high speed SRM drive system for blower with a new 4-level inverter and precise excitation position generator. For the high speed blower, a proper 12/8 SRM is designed and analyzed. In order to get a fast build-up and demagnetization of excitation a current, now 4-level inverter system is proposed. The proposed 4-level inverter has additional charge capacitor, power switch and diode in the conventional asymmetric converter. The charged high voltage is supplied to the phase winding for fast current build-up, and demagnetization current is charged to additional capacitor of 4-level inverter. In addition, a precise excitation position generator can reduce turn-on and turn-off angle error according to sampling period of digital control system. The proposed high speed SRM drive system is verified by computer simulation.

• The Transactions of the Korean Institute of Power Electronics
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• v.9 no.5
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• pp.457-466
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• 2004

In this paper, a modified converter is presented and analyzed to use as a photovoltaic converter. And also a new parallel driving scheme is proposed to increase output power and to reduce the output voltage ripple. The ratio of the output to the input voltage of the modified converter is equal to that of the boost converter. The difference between both converters is the composition of output terminal. Owing to the discrepancy, a working voltage of the output capacitor of the modified converter becomes lower, thus the capacitance value of the capacitor can be smaller than that of the boost converter. The proposed parallel driving is based on the modified converter and a current-mode-control method. It gives a good solution for alleviating the current sharing unbalance problem of conventional parallel operations. It reduces the output voltage ripple by means of increasing the equivalent switching frequency without additional switching losses. The validity of the proposed parallel driving strategy is verified through computer-aided simulations and experimental results.

• Journal of IKEEE
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• v.23 no.1
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• pp.254-260
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• 2019

The failure rate of bidirectional dc-to-dc converter is predicted through the failure mode and effect analysis (FMEA) and the fault-tree analysis (FTA) considering the operational risk. In order to increase the driving voltage of the electric vehicle efficiently, the bidirectional converter is attached to the front of the inverter. It has a boost mode for discharging battery power to the dc-link capacitor and a buck mode for charging the regenerative power to the battery. Based on the results of the FMEA considering the operating characteristics of the bidirectional converter, the fault-tree is designed considering the risk of the converter. After setting the design parameters for the MCU for the electric vehicle, we analyze the failure rate of the capacitor due to the output voltage ripple and the inductor component failure rate due to the inductor current ripple. In addition, we obtain the failure rate of major parts according to operating temperature using MIL-HDBK-217F. Finally, the failure rate and the mean time between failures (MTBF) of the converter are predicted by reflecting the part failure rate to the basic event of the fault-tree.

• Journal of Electrical Engineering and Technology
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• v.8 no.5
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• pp.1012-1020
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• 2013

In this work, Self-adaptive Differential Evolutionary (SaDE) algorithm is proposed to solve Optimal Location and Size of Capacitor (OLSC) problem in radial distribution networks. To obtain the SaDE algorithm, two improvements have been applied on control parameters of mutation and crossover operators. To expand the study, three load conditions have been considered, i.e., constant, varying and effective loads. Objective function is introduced for the load conditions. The annual cost is fitness of problem, in addition to this cost, CPU time, voltage profile, active power loss and total installed capacitor banks and their related costs have been used for comparisons. To confirm the ability of each improvements of SaDE, the improvements are studied both in separate and simultaneous conditions. To verify the effectiveness of the proposed algorithm, it is tested on IEEE 10-bus and 34-bus radial distribution networks and compared with other approaches.

• Journal of Power Electronics
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• v.16 no.5
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• pp.1629-1638
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• 2016

Differential power processing (DPP) systems are among the most effective architectures for photovoltaic (PV) power systems because they are highly efficient as a result of their distributed local maximum power point tracking ability, which allows the fractional processing of the total generated power. However, DPP systems require a high-efficiency, high step-up/down bidirectional converter with broad operating ranges and galvanic isolation. This study proposes a single, magnetic, high-efficiency, high step-up/down bidirectional DC-DC converter. The proposed converter is composed of a bidirectional flyback and a bidirectional isolated switched-capacitor cell, which are competitively cheap. The output terminals of the flyback converter and switched-capacitor cell are connected in series to obtain the voltage step-up. In the reverse power flow, the converter reciprocally operates with high efficiency across a broad operating range because it uses hard switching instead of soft switching. The proposed topology achieves a genuine on-off interleaved energy transfer at the transformer core and windings, thus providing an excellent utilization ratio. The dynamic characteristics of the converter are analyzed for the controller design. Finally, a 240 W hardware prototype is constructed to demonstrate the operation of the bidirectional converter under a current feedback control loop. To improve the efficiency of a PV system, the maximum power point tracking method is applied to the proposed converter.

• JSTS:Journal of Semiconductor Technology and Science
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• v.13 no.2
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• pp.108-113
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• 2013

This paper describes a low power asynchronous successive approximation register (SAR) type 12b analog-to-digital converter (ADC) for biomedical applications in a 0.35 ${\mu}m$ CMOS technology. The digital-to-analog converter (DAC) uses a capacitive split-arrays consisting of 6-b main array, an attenuation capacitor C and a 5-b sub array for low power consumption and small die area. Moreover, splitting the MSB capacitor into sub-capacitors and an asynchronous SAR reduce power consumption. The measurement results show that the proposed ADC achieved the SNDR of 68.32 dB, the SFDR of 79 dB, and the ENOB (effective number of bits) of 11.05 bits. The measured INL and DNL were 1.9LSB and 1.5LSB, respectively. The power consumption including all the digital circuits is 6.7 ${\mu}W$ at the sampling frequency of 100 KHz under 3.3 V supply voltage and the FoM (figure of merit) is 49 fJ/conversion-step.