• 한국산학기술학회논문지
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• 제19권4호
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• pp.117-122
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• 2018

대용량 3상 시스템 에어컨은 최근 들어 소비 전력 저감을 위해 인버터 회로를 포함하고 있다. 인버터 회로는 교류를 다이오드를 통해 정류하고 DC-link 전원부 콘덴서에 의해 평활된 직류를 사용한다. 이 때 평활에 사용되는 DC-link 전원부 콘덴서는 전압 리플, 전류 리플 조건을 만족하기 위해 전해 콘덴서가 일반적으로 사용된다. 콘덴서의 용량을 줄이게 되면 회로부의 크기 및 무게, 비용을 줄일 수 있게 된다. 본 논문에서는 최소점 추정 PPL(Phase Locked Loop) 위상 제어와 평균 전압 d축 전류제어 기법을 조합하여 입력 리플 전류를 약 90% 저감하는 알고리즘을 제안한다. 입력 리플 전류의 감소로 인해 DC-link 콘덴서의 전류 리플도 감소하므로 콘덴서의 용량을 줄일 수 있지만 전해 콘덴서의 경우 등가 직렬 저항(ESR : Equivalent Series Resistance)이 크기 때문에 발열로 인한 수명이 한계를 가진다. 본 논문에서는 전해 콘덴서 대신 DC-link 단에 전류 리플을 고려한 필름 콘덴서를 선정하는 방법을 제안한다. 필름 콘데서의 정전 용량 선정, 내압 선정, RMS(Root Mean Square) 전류 용량, RMS 전류 주파수 해석을 고려해 콘덴서의 용량을 선정할 경우 1680uF의 전해 콘덴서를 20uF로 용량을 낮추어 설계함으로써 전원부 콘덴서의 크기 및 무게, 비용을 줄였으며 전동기 구동을 통해 동작을 확인하였다.

• Journal of Power Electronics
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• 제4권1호
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• pp.18-27
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• 2004

The output storage capacitor of the PFC converters is commonly designed for the selected hold-up time or the allowed output ripple voltage percentage. Nevertheless, this output capacitor is a main contribution factor to the PFC system stability. Moreover, seeking for a minimum output storage capacitor that assures the PFC desired operation under all condition, and providing the advantage of a small size and low cost is the main interesting target for engineering. Therefore, in this issue the design steps of the PFC converter have been discussed depending on three choices, output ripple, hold-up time, and stability. It is cleared that any design must take the minimum required storage capacitor for stability prospective as step-l in deign, then apply for any other specification like hold-up time or ripple percentage.

• Journal of Power Electronics
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• 제5권3호
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• pp.190-197
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• 2005

This paper presents a technique to reduce the low frequency ripple voltage of the dc output in a BIFRED converter with a small-sized energy storage capacitor. The proposed pulse width control method can be effectively used to suppress the low frequency ripple appeared in the dc output and still maintains generally good performance such as low THD of input line current and a high power factor. Using the small-sized energy storage capacitor, it has better merits of low cost and smaller size than a conventional BIFRED converter. The proposed technique is illustrated its validity and effectiveness through simulations.

• Journal of Power Electronics
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• 제13권4호
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• pp.558-568
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• 2013

In this paper, a new decoupling technique for a flyback inverter using an active power decoupling circuit with auxiliary winding and a novel switching pattern is proposed. The conventional passive power decoupling method is applied to control Maximum Power Point Tracking (MPPT) efficiently by attenuating double frequency power pulsation on the photovoltaic (PV) side. In this case, decoupling capacitor for a flyback inverter is essentially required large electrolytic capacitor of milli-farads. However using the electrolytic capacitor have problems of bulky size and short life-span. Because this electrolytic capacitor is strongly concerned with the life-span of an AC module system, an active power decoupling circuit to minimize input capacitance is needed. In the proposed topology, auxiliary winding defined as a Ripple port will partially cover difference between a PV power and an AC Power. Since input capacitor and auxiliary capacitor is reduced by Ripple port, it can be replaced by a film capacitor. To perform the operation of charging/discharging decoupling capacitor $C_x$, a novel switching sequence is also proposed. The proposed topology is verified by design analysis, simulation and experimental results.

• Journal of Power Electronics
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• 제12권2호
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• pp.249-257
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• 2012

An interleaved PWM converter is proposed to implement the features of zero voltage switching (ZVS), load current sharing and ripple current reduction. The proposed converter includes two ZVS converters with a common clamp capacitor. With the shared capacitor, the charge balance of the two interleaved parts is automatically regulated under input voltage and load variations. The active-clamping circuit is used to realize the ZVS turn-on so that the switching losses on the power switches are reduced. The ZVS turn-on of all of the switching devices is achieved during the transition interval. The interleaved pulse-width modulation (PWM) operation will reduce the ripple current and the size of the input and output capacitors. The current double rectifier (CDR) is adopted in the secondary side to reduce output ripple current so that the sizes of the output chokes and capacitor are reduced. The circuit configuration, operation principles and design considerations are presented. Finally experimental results based on a 408W (24V/17A) prototype are provided to verify the effectiveness of the proposed converter.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2015년도 제46회 하계학술대회
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• pp.968-969
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• 2015

This paper proposes a novel analysis method for calculating inverter DC bus capacitance and line reactor parameters. In the realization process, DC bus capacitance parameter, and ripple current, life of DC bus capacitor, interaction between DC bus capacitance can be calculated by using Newton-Raphson procedure. The design scheme of DC bus capacitor and line reactor, specific parameters such as capacitance, loss, ripple current, central average temperature, life, ripple current, loss, size, central temperature of the reactor were given. Simulation results show that this scheme can accurately calculate the DC bus capacitance and line reactor parameters. Compared with calculation result of references, cost and volume are half. The indicators meet the demand of practical engineering. It had affirmed precision of the analytical method and verified correctness and feasibility of this method.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2004년도 전력전자학술대회 논문집(2)
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• pp.542-546
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• 2004

This paper presents a technique to reduce the low frequency ripple voltage of the dc output in a BIFRED converter with a small-sized energy storage capacitor. The proposed pulse width control method can be effectively used to suppress the low frequency ripple appeared in the dc output and still shows generally good performance such as low THD of input line current and high power factor. Using the small-sized energy storage capacitor, it has better merits of low cost and small size than a conventional BIFRED converter. The proposed technique is illustrated its validity and effectiveness through simulations.

• 한국태양에너지학회 논문집
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• 제39권2호
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• pp.81-92
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• 2019

When Photovoltaic inverter is connected to grid and used as PVPCS (Photovoltaic Power Conditioning System), 120 Hz AC ripple occurs at the dc-link capacitor voltage. This AC ripple reduces the efficiency of PVPCS and shortens the lifetime of the capacitor. In this paper, we design a notch filter to remove AC ripple. As a result, the AC voltage ripple was removed from the dc link and the THD of the PVPCS output current with the notch filter was lowered. This notch filter is determined by the damping coefficient, the bandwidth coefficient, and the switching frequency. Among these, the switching frequency determines the switching loss and the size of the LC filter, and the PVPCS with the high switching frequency has a greater efficiency loss due to the switching loss than the efficiency improvement by the notch filter. Therefore, it is important to set the optimum switching frequency in the PVPCS with the notch filter applied. In this paper, THD and switching loss of PVPCS output current with notch filter are calculated through simulation, and cost function to calculate optimum switching frequency through data is proposed.

• 한국전자통신학회논문지
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• 제7권6호
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• pp.1429-1435
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• 2012

태양광 시스템이나 연료전지 시스템 그리고 전기자동차에 많이 사용되는 DC-DC 컨버터는 부스트 컨버터이다. 이러한 부스트 컨버터를 병렬로 연결하고 위상차를 두고 동작하여 입출력 전류리플을 줄이는 인터리브드 부스트 컨버터가 최근에 많이 사용되고 있다. 이 회로는 입출력 전류 리플이 작기 때문에 입출력 커패시터의 크기를 줄일 수 있다. 따라서 기존의 전해 커패시터를 신뢰성이 우수한 필름 커패시터로 교체할 수 있고 이는 전체 시스템의 수명 및 신뢰성을 향상시킬 수 있다. 본 논문에서는 다단 인터리브드 부스트 컨버터에 사용되는 출력 커패시터의 전류리플 수식을 유도하고 듀티에 따른 특성을 알아본다. 이를 확인하기 위해서 PSIM 툴을 이용하여 계산된 값과 비교를 할 것이다.

• 전력전자학회논문지
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• 제9권4호
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• pp.381-389
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• 2004

본 논문에서는 입력단 커패시터를 제거한 인버터의 제어에 아날로그 적분기를 이용한 새로운 비선형 제어 기법인 순시보상형 PWM 제어회로를 적용하고 있다. 비선형 순시보상형 PWM 제어기는 순시 입력전압의 변동에 대한 보상과 제어기준값에 대한 추종이 스위칭 한 주기 내에서 이루어지는 다이나믹하고 강인한 응답성을 가지고 있으며, 아날로그 소자를 사용하고 있어 제어회로가 간단하면, 인버터 입력 맥동전압을 보상함으로 대형의 평활용 커패시터가 필요치 않아서 소형, 저가형으로 부피가 적은 인버터를 제작 할 수 있다는 장점을 가지고 있다. 이러한 장점을 가지고 있는 순시보상형 PWM 제어 인버터를 기존의 VVVF 제어형 전동기 인버터 시스템을 대치하여 저가이고 소형의 인버터 시스템으로 제안하고 실험을 통하여 우수한 동작특성을 확인하고 있다.