• The KIPS Transactions:PartA
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• v.19A no.1
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• pp.35-44
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• 2012

Traditional technologies that are used to improve the performance of hard disk drives show many negative cases if they are applied to solid state drives (SSD). Access time and block sequence in hard disk drives that consist of mechanical components are very important performance factors. Meanwhile, SSD provides superior random read performance that is not affected by block address sequence due to the characteristics of flash memory. Practically, it is recommended to disable prefetching if a SSD is installed in a personal computer. However, this paper presents a combinational method of a prefetching scheme and a memory management that consider the internal structure of SSD and the characteristics of NAND flash memory. It is important that SSD must concurrently operate multiple flash memory chips. The I/O unit size of NAND flash memory tends to increase and it exceeded the block size of operating systems. Hence, the proposed prefetching scheme performs in an operating unit of SSD. To complement a weak point of the prefetching scheme, the proposed memory management scheme adaptively evicts uselessly prefetched data to maximize the sum of cache hit rate and prefetch hit rate. We implemented the proposed schemes as a Linux kernel module and evaluated them using a commercial SSD. The schemes improved the I/O performance up to 26% in a given experiment.

• The KIPS Transactions:PartC
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• v.8C no.6
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• pp.847-854
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• 2001

The Web continues to grow fast rate in both a large aclae volume of traffic and the size and complexity of Web sites. Along with growth, the complexity of tasks such as Web site design Web server design and of navigating simply through a Web site have increased. An important input to these design tasks is the analysis of how a web site is being used. The is paper proposes a Page logging System(PLS) identifying reliably user sessions required in Web mining system PLS consists of Page Logger acquiring all the page accesses of the user Log processor producing user session from these data, and statements to incorporate a call to page logger applet. Proposed PLS abbreviates several preprocessing tasks which spends a log of time and efforts that must be performed in Web mining systems. In particular, it simplifies the complexity of transaction identification phase through acquiring directly the amount of time a user stays on a page. Also PLS solves local cache hits and proxy IPs that create problems with identifying user sessions from Web sever log.

• Journal of Internet Computing and Services
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• v.16 no.5
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• pp.19-27
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• 2015

Due to the advantages of fast read/write operation and low power consumption, SSD(Solid State Drive) is now widely adopted as storage device of smart phone, laptop computer, server, etc. However, the shortcomings of SSD such as limited number of write operations and asymmetric read/write operation lead to the problem of shortened life span of SSD. Therefore, the block replacement policy of SSD used as cache for HDD is very important. The existing solutions for improving the lifespan of SSD including the LARC scheme typically employ the LRU algorithm to manage the SSD blocks, which may increase the miss rate in SSD due to the replacement of frequently used block instead of rarely used block. In this paper we propose a novel block replacement scheme which considers the block reuse interval to effectively handle various data read/write patterns. The proposed scheme replaces the block in SSD based on the recency decided by reuse interval and age along with hit ratio. Computer simulation using workload trace files reveals that the proposed scheme consistently improves the performance and lifespan of SSD by increasing the hit ratio and decreasing the number of write operations compared to the existing schemes including LARC.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.36 no.1A
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• pp.82-89
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• 2011

The Proxy Mobile IPv6 is a network-based localized mobility management protocol. In the PMIPv6, Mobile Nodes are topologically anchored at a Local Mobility Anchor, which forwards all data packets for registered Mobile Nodes. Since all data packets destined for the Mobile Nodes a1ways traverse the Mobile Nodes's Local Mobility Anchor, the LMA might be bottleneck and the end-to-end de1ay are increased. Therefore, in this paper, we proposed an enhanced Route Optimization scheme in Multiple Local Mobility Anchors environment. In order to rapid1y detect Route Optimization, we designed Domain Information Table in Mobility Access Gateway. Furthermore, we use Correspondent Binding Cache in Local Mobility Anchor to maintain Route Optimization information during Mobile Nodes's handover. To solve packet loss and reodering problems during handover, we propose a new buffering and forwarding scheme.

• Journal of KIISE:Software and Applications
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• v.37 no.4
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• pp.311-316
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• 2010

Esterel is an imperative synchronous language that is used to develop memories, cache controllers, bus interfaces, and so on. An Esterel statement is called schizophrenic if it is executed more than once in an instant. A schizophrenic statement may cause problems when it is translated to hardware circuits; a circuit performs more than one reaction in a clock. Previous works claim that only local signal declarations and parallel statements may cause schizophrenic problems. However, control signals produced by a trap statement or data signals used by emit statements can cause schizophrenia. They are new schizophrenic patterns. Especially, schizophrenic problems caused by emit statements cannot be solved by a loop unrolling technique that is the key idea of previous curing techniques for schizophrenic problems. In this paper, we introduce and define the two schizophrenic problems.

• KIISE Transactions on Computing Practices
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• v.21 no.1
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• pp.88-93
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• 2015

In modern computer systems, DRAM is commonly used as main memory due to its low read/write latency and high endurance. However, DRAM is volatile memory that requires periodic power supply (i.e., memory refresh) to sustain the data stored in it. On the other hand, PCM is a promising candidate for replacement of DRAM because it is non-volatile memory, which could sustain the stored data without memory refresh. PCM is also available for byte-addressable access and in-place update. However, PCM is unsuitable for using main memory of a computer system because it has two limitations: high read/write latency and low endurance. To take the advantage of both DRAM and PCM, a hybrid main memory, which consists of DRAM and PCM, has been suggested and actively studied. In this paper, we propose a novel page replacement algorithm for hybrid main memory. To cope with the weaknesses of PCM, our scheme focuses on reducing the number of PCM writes in the hybrid main memory. Experimental results shows that our proposed page replacement algorithm reduces the number of PCM writes by up to 80.5% compared with the other page replacement algorithms.

• Journal of IKEEE
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• v.5 no.1 s.8
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• pp.59-66
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• 2001

In this paper, we propose a dynamic source routing protocol supporting asymmetric paths for mobile Ad Hoc networks that contain unidirectional links. At present, the existing dynamic source routing protocol supports only symmetric paths that consist of bidirectional links for routing. However, in fact, there can exist unidirectional links due to asymmetric property of mobile terminals or current wireless environment. Thus, we implement a mobile Ad Hoc routing protocol supporting unidirectional links, which is fit for more general wireless environment. Especially, the proposed protocol uses an improved multipath maintenance method in order to perform rapid route reconfiguration when route error due to mobility is detected. For performance evaluation, we consider the following factors: average route discovery time and average data reception rate. In order to obtain the factors of the performance evaluation, we did simulation for 900 seconds in the step of 100 seconds with the following scenarios: usage of route cache in intermediate nodes on route path, and different mobility/connection patterns.

• Journal of the Korea Society of Computer and Information
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• v.15 no.8
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• pp.149-156
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• 2010

As following the development of the USN technology, sensor node used in sensor network has capability of quick data process and storage to support efficient network configuration is enabled. In addition, tree-based structure was transformed to cluster in the construction of sensor network. However, query processing based on existing tree structure could be inefficient under the cluster-based network. In this paper, we suggest energy efficient query processing mechanism using filtering through data attribute classification in cluster-based sensor network. The suggestion mechanism use advantage of cluster-based network so reduce energy of query processing and designed more intelligent query dissemination. And, we prove excellence of energy efficient side with MATLab.

• Journal of KIISE:Computer Systems and Theory
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• v.36 no.2
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• pp.102-110
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• 2009

The memory wall is the growing disparity of speed between CPU and memory outside the CPU chip. An economical solution is a memory hierarchy organized into several levels, such as processor registers, cache, main memory, disk storage. We introduce a novel memory hierarchy optimization technique in Linux based embedded systems using on-chip SRAM for the first time. The optimization technique allocates On-Chip SRAM to the code/data that selected by programmers by using virtual memory systems. Experiments performed with nine applications indicate that the runtime improvements can be achieved by up to 35%, with an average of 14%, and the energy consumption can be reduced by up to 40%, with an average of 15%.

• Journal of Korea Society of Industrial Information Systems
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• v.15 no.5
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• pp.105-111
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• 2010

SWF(Shock Wave Flash) file is a format file for vector graphics produced by Adobe. It is widely used for a variety of contents such as advertising at websites, widgets, games, education, and videos and it contains various types of data such as sound sources, script, API and images. Many SWF files contain URL information on action script for communication in the network and they can be used as important research data as well as PC users' Web Browser history in terms of forensic investigation. And a decompiler for analyzing SWF files exists by which SWF files can be analysed and URL information can be verified. However, it takes a long time to verify the URL information on action scripts of multiple SWF files by the decompiler. In this paper, analysis of URL information on action scripts and extraction of URL information from multiple SWF files by designing analysis tools for URL information in SWF files is studied.