• Journal of the Korea Institute of Information Security & Cryptology
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• v.32 no.2
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• pp.163-170
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• 2022

LEA is a lightweight block cipher developed in Korea in 2013. In this paper, among block cipher operation methods, CTR operation mode and GCM operation mode that provides confidentiality and integrity are implemented. In the LEA-CTR operation mode, we propose an optimization implementation that omits the operation between states through the state fixation and omits the operation through the pre-operation by utilizing the characteristics of the fixed nonce value of the CTR operation mode. It also shows that the proposed method is applicable to the GCM operation mode, and implements the GCM through the implementation of the GHASH function using the Galois Field(2¹²⁸) multiplication operation. As a result, in the case of LEA-CTR to which the proposed technique is applied on 32-bit RISC-V, it was confirmed that the performance was improved by 2% compared to the previous study. In addition, the performance of the GCM operation mode is presented so that it can be used as a performance indicator in other studies in the future.

• Journal of Information Processing Systems
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• v.11 no.2
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• pp.266-279
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• 2015

In this paper, we propose a novel block cipher mode of operation, which is known as the counter chain (CC) mode. The proposed CC mode integrates the cipher block chaining (CBC) block cipher mode of operation with the counter (CTR) mode in a consistent fashion. In the CC mode, the confidentiality and authenticity of data are assured by the CBC mode, while speed is achieved through the CTR mode. The proposed mode of operation overcomes the parallelization deficiency of the CBC mode and the chaining dependency of the counter mode. Experimental results indicate that the proposed CC mode achieves the encryption speed of the CTR mode, which is exceptionally faster than the encryption speed of the CBC mode. Moreover, our proposed CC mode provides better security over the CBC mode. In summary, the proposed CC block cipher mode of operation takes the advantages of both the Counter mode and the CBC mode, while avoiding their shortcomings.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2008.10a
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• pp.243-246
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• 2008

This thesis suggests block cipher operating mode using ASR(Arithmetic Shift Register). ASR is ratted arithmetic shift register which is sequence that is not 0 but initial value $A_0$ multiplies not 0 or 1 but free number D on $GF(2^n)$. This thesis proposes ASR mode which changes output multiplying d and Floating ASR mode which has same function but having strengthened stability altering d. If we use ASR's output as a counter, there's advantage that it has higher stability and better speed than CTR. Also, ASR mode and FASR mode have advantage of Random access which is not being functioned on CTR mode, they can be widely used to any part which Random access is needed.

• Journal of the Korea Institute of Information Security & Cryptology
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• v.21 no.5
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• pp.47-58
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• 2011

Recently, there are several technologies for protecting information in the lightweight device, One of them, the AES[1] algorithm and CRT mode, is used for numerous services(e,g, OMA DRM, VoIP, IPTV) as encryption technique for preserving confidentiality. Although it is possible that the AES algorithm CRT mode can parallel process transmitting data, IPTV Set-top Box or Mobile Device that uses these streaming service has limited computation-ability. So optimizing crypto algorithm and enhancing its efficiency for those environment have become an important issue. In this paper, we propose implementation method that can improve efficiency of the AES-CRT Mode by improving algorithm logics. Moreover, we prove the performance of our proposal on the mobile device which has limited capability.

• Journal of the Korea Institute of Information Security & Cryptology
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• v.32 no.1
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• pp.1-9
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• 2022

Fixslicing AES is a technique that omits the Shiftrows step to minimize the cost of the linear layer of Bitsliced AES, showing a 30% performance over the Bitsliced technique. However, the amount of code increases to compensate for the omitted shiftrows. Therefore, it is proposed to be divided into Semi-Fixsliced in which only half of shiftrows are omitted and Fully-Fixsliced in which Shiftrows are omitted completely. In this paper, we propose a CTR mode implementation of Fixslicing AES on RISC-V using the pre-computed table technique. By utilizing the characteristics of the CTR mode, it is possible to perform fast encryption by omitting up to the second round SubBytes from the encryption process through pre-computed up to the second round SubBytes operation. Using this technique, it was confirmed that Semi-Fixsliced has a performance of 1,345 cycles per block and a performance improvement of 7% compared to the previous performance result, and Fully-Fixsliced has a performance of 1,283 cycles per block and a performance of 9% compared to the previous performance result on 32-bit RISC-V.

• Journal of IKEEE
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• v.22 no.2
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• pp.233-241
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• 2018

This paper describes a lightweight implementation of a cryptographic processor supporting GCM (Galois/Counter Mode) authenticated encryption (AE) that is based on the two block cipher algorithms of ARIA and AES. It also provides five modes of operation (ECB, CBC, OFB, CFB, CTR) for confidentiality as well as the key lengths of 128-bit and 256-bit. The ARIA and AES are integrated into a single hardware structure, which is based on their algorithm characteristics, and a $128{\times}12-b$ partially parallel GF (Galois field) multiplier is adopted to efficiently perform concurrent processing of CTR encryption and GHASH operation to achieve overall performance optimization. The hardware operation of the ARIA/AES-GCM AE processor was verified by FPGA implementation, and it occupied 60,800 gate equivalents (GEs) with a 180 nm CMOS cell library. The estimated throughput with the maximum clock frequency of 95 MHz are 1,105 Mbps and 810 Mbps in AES mode, 935 Mbps and 715 Mbps in ARIA mode, and 138~184 Mbps in GCM AE mode according to the key length.

• Nuclear Engineering and Technology
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• v.56 no.4
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• pp.1532-1537
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• 2024

Time-of-flight (TOF) PET detectors with fast-rise-time scintillators and fast-single photon time resolution silicon photomultiplier (SiPM) have been developed to improve the coincidence timing resolution (CTR) to sub-100 ps. The CTR can be further improved with an optimal bandwidth and minimized electronic noise in the readout circuit and this helps reduce the distortion of the fast signals generated from the TOF-PET detector. The purpose of this study was to develop an ultra-high frequency and fully-differential (UF-FD) readout circuit that minimizes distortion in the fast signals produced using TOF-PET detectors, and suppresses the impact of the electronic noise generated from the detector and front-end readout circuits. The proposed UF-FD readout circuit is composed of two differential amplifiers (time) and a current feedback operational amplifier (energy). The ultra-high frequency differential (7 GHz) amplifiers can reduce the common ground noise in the fully-differential mode and minimize the distortion in the fast signal. The CTR and energy resolution were measured to evaluate the performance of the UF-FD readout circuit. These results were compared with those obtained from a high-frequency and single ended readout circuit. The experiment results indicated that the UF-FD readout circuit proposed in this study could substantially improve the best achievable CTR of TOF-PET detectors.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.12 no.5
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• pp.863-869
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• 2008

In this paper, a system with sensor network security mechanism which can be applied to home network structure is designed and it is implemented on a virtual network of a home network middleware. The basic structure of home networking middleware supports one-to-one (unicast) or broadcast communication mode between the lookup server and service nodes on the network. Confidentiality and authentication are key security factors of the one-to-one communication and user authentication is crucial for broadcasting mode. One of the sensor network's security techniques SPINS consists of SNEP and ${\mu}TESLA$. The SNEP ensures confidentiality and authentication, and ${\mu}TESLA$ provides broadcast authentication. We propose a SPIN based home network middleware and it is implemented by using the CBC-MAC for MAC generation, the counter mode (CTR) for message freshness, the pseudo random function (PRF) and RC5 as encryption algorithm. The implementation result shows that an attacker cannot decrypt the message though he gets the secure key because of CTR mode. In addition, we confirmed that a received message of the server is authenticated using MAC.

• Proceedings of the KIPE Conference
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• 2015.07a
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• pp.227-228
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• 2015

본 논문에서는 Optocoupler 절연형 오프라인 플라이백 변환기 궤환 단의 직류 바이어스 해석 기법을 제안한다. 직류 바이어스 해석을 통해 목표한 Current Transfer Ratio(CTR)를 얻고 Junction Capacitance($C_j$)를 측정하여 제어기 설계에 적용시켜 안정도 및 성능을 측정하였다. NCP1230, PC817, TL431 IC를 이용하여 플라이백 변환기의 제어회로를 제작하였고, 시뮬레이션을 이용해 직류 바이어스 해석 기법의 타당성을 검증하였다.

• Journal of the Korea Institute of Information Security & Cryptology
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• v.17 no.1
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• pp.103-107
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• 2007

This paper represents a forgery attack on new authenticated encryption mode $NAE^{[1]}$ which was proposed at JCCI 2003. NAE is a new authenticated encryption mode which is combined with CFB mode and CTR mode. And it provides confidentiality. In this paper, we show that it is possible to make a valid ciphertext-tag pair only by modifying a ciphertext.