• The KIPS Transactions:PartA
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• v.19A no.3
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• pp.139-146
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• 2012

In the server cluster environment, one of the ways saving energy is to control server's power according to traffic conditions. This is to determine the ON/OFF state of servers according to energy usage of data center and each server. To do this, we need a way to estimate each server's energy. In this paper, we use a software-based power consumption estimation model because it is more efficient than the hardware model using power meter in terms of energy and cost. The traditional software-based power consumption estimation model has a drawback in that it doesn't know well the computing status of servers because it uses only the idle status field of CPU. Therefore it doesn't estimate consumption power effectively. In this paper, we present a CPU field based power consumption estimation model to estimate more accurate than the two traditional models (CPU/Disk/Memory utilization based power consumption estimation model and CPU idle utilization based power consumption estimation model) by using the various status fields of CPU to get the CPU status of servers and the overall status of system. We performed experiments using 2 PCs and compared the power consumption estimated by the power consumption model (software) with that measured by the power meter (hardware). The experimental results show that the traditional model has about 8-15% average error rate but our proposed model has about 2% average error rate.

• Smart Media Journal
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• v.8 no.3
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• pp.41-46
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• 2019

In a MMORPG, a typical application of virtual environment systems, it is a common desire to play in a more realistic environment. However, it is very difficult to provide a latency-free virtual environment to a large user base, mainly due to the fact that the real environment must be configured on multiple servers rather than on single server and that data must be shared on the real server when users move from one region to another. Experiencing response delays continuously in the process of information synchronization between servers greatly deteriorates the degree of immersion. In order to solve this problem, it is necessary to minimize the response delay occurring in the information synchronization process between the servers. In this paper, we propose Migration Agent for efficient information synchronization between field servers providing information of virtual environment and minimizing response delay between Field Server and PC(Player Character) and implement it in cloud computing network. In the proposed system, CPU utilization of field server increased by 6 ~ 13%, and response time decreased by 5 ~ 10 seconds over the existing system in 70,000 ~ 90,000 PCs

• 제어로봇시스템학회:학술대회논문집
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• 2000.10a
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• pp.93-93
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• 2000

In this study, physical and data link layer protocols of FOUNDATION Fieldbus are implemented. INTEL386EX and 80196KC are used fer the CPU of PC interface board and sensor interface module, respectively The physical layer protocol of FOUNDATION Fieldbus is developed by using FB3050 chip, the fieldbus communication controller ASIC. The data Link layer protocol of FOUNDATION Fieldbus is implemented by software.

• Journal of Institute of Control, Robotics and Systems
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• v.10 no.4
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• pp.371-376
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• 2004

Distributed Network Protocol Version 3.0 (DNP3.0) is the communication protocol developed for the interoperability between a RTU and a central control station of SCADA in the power utility industry. In this paper DNP3.0 is implemented by using HDL with FPGA and C program on Hitachi H8/532 processor. DNP3.0 is implemented from physical layer to network layer in hardware level to reduce the computing load on a CPU. Finally, the ASIC for DNP3.0 has been manufactured from Hynix Semiconductor. The commercial feasibility of the hardware through the communication test with ASE2000 and DNP Master Simulator is performed. The developed protocol becomes one of IP, and can be used to implement SoC for the terminal device in SCADA systems. Also, the result can be applicable to various industrial controllers because it is implemented in HDL.

• Journal of Institute of Control, Robotics and Systems
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• v.6 no.7
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• pp.594-601
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• 2000

EIA-709.1 Control Network Protocol is the basic protocol of LonWorks systems that is emerg-ing as a fieldbus device. In this paper the protocol is implemented by using VHDL with FPGA and C program on an Intel 8051 processor. The protocol from the physical layer to the network layer of EIA-709.1 is im-plemented in a hardware level,. So it decreases the load of the CPU for implementing the protocol. We verify the commercial feasibility of the hardware through the communication test with Neuron Chip. based on EIA-709.1 protocol which is used in industrial fields. The developed protocol based on FPGA becomes one of IP can be applicable to various industrial field because it is implemented by VHDL.

• Proceedings of the Korea Information Processing Society Conference
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• 2013.11a
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• pp.680-683
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• 2013

방화벽, 백신, IPS, 취약점 점검 시스템 등 중요 시스템의 보안을 위해 다수의 소프트웨어들이 운용되고 있다. 그 중 취약점 점검 시스템은 중요 서버의 보안 취약점을 점검하여 사전에 보안 위협을 예방한다는 측면에서 중요하다. 그러나 서버의 취약점을 점검해주는 소프트웨어 자체에 취약점이 존재한다면 취약점 보완을 위해 도입한 시스템이 취약점을 내포하고 있는 모순된 상황을 발생시킨다. 본 논문에서는 취약점 점검 시스템의 매니저와 에이전트의 점검 패킷을 분석하여 데이터 필드에 임의의 값을 주입하는 SPIKE 기반의 퍼즈 테스팅 기법으로 매니저와 에이전트 모두에서 DoS(Denial of Service) 취약점을 발견하였다. 해당 취약점은 다수의 SQL 세션을 생성하고 시스템의 CPU 점유율을 100%로 높여 시스템의 다른 서비스조차 이용할 수 없는 상태를 보였다.

• Journal of the Korea Society of Computer and Information
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• v.25 no.4
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• pp.97-103
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• 2020

Wireless sensor networks collect and analyze sensing data in a variety of environments without human intervention. The sensor network changes its lifetime depending on routing protocols initially installed. In addition, it is difficult to modify the routing path during operating the network because sensors must consume a lot of energy resource. It is important to measure the network performance through simulation before building the sensor network into the real field. This paper proposes a WSN model for a low-energy adaptive clustering hierarchy protocol using DEVS kernel models. The proposed model is implemented with the sub models (i.e. broadcast model and controlled model) of the kernel model. Experimental results indicate that the broadcast model based WSN model showed lower CPU resource usage and higher message delivery than the broadcast model.

• Journal of IKEEE
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• v.22 no.1
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• pp.87-92
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• 2018

Like CPUs, regular expression processors that perform regular expression pattern matching using instructions have been proposed recently. Of these, only REMPc provides features for character class matching. In this paper, we propose an architecture for efficient character class matching in a regular expression processor, which use character class bitmap format in a instruction operand field and implement the hard-wired character class comparator for several frequently used character classes. Using the proposed method, most of the character classes used in Snort rule can be represented by an operand or an instruction. Thus, character class matching can be performed more efficiently in the proposed archiecture than in REMPc.

• Journal of Institute of Control, Robotics and Systems
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• v.6 no.10
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• pp.903-910
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• 2000

In this paper, we describe a slave chip based on the Profibus-DP protocol and a system board to verify the developed slave chip. The Profibus-DP protocol is designed using VHDL and implemented on FPGA. The system board adopting the developed FPGA is designed FPGA is designed in which the firmware is implemented on Intel 8051 by using C language. Among the Profibus-DP protocols, low level layers from the physical layer to the data link layer is implemented in the form of hardware that we are able to greatly reduce the CPU load in processing protocols, and then higher layers could be processed by software. These technologies result in an IP to make terminal devices in the distributed control systems. Therefore, many digital logics as well as communication logics can be implemented onto SOC(System On a Chip) and it could be applied to various fieldbus-related areas.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.9 no.6
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• pp.761-767
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• 1998

The Perfectly Matched Layer(PML) provide good performance in absorption over a wide frequency range and is an appropriate ABC for waveguides with high dispersion. In this paper, a novel algorithm is proposed to improve the computational efficiency of the PML. In the input and output ports, the fields are decomposed into a series of modes, and then an appropriate ABC is applied to each mode. CPU time and memory storage requirements are greatly reduced, since the computational region is analyzed in one dimension. A WG-90 rectangular waveguide with a thick asymmetric iris is analyzed by Finite-Difference Time-Domain(FDTD) simulations with the conventional PML and the proposed one-dimensional (1-D) PML. Numerical results show that the computational efficiency is significantly improved by the proposed method.