• Tribology and Lubricants
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• v.34 no.3
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• pp.115-122
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• 2018

Chemical mechanical polishing (CMP) is a hybrid processing method in which the surface of a wafer is planarized by chemical and mechanical material removal. Since mechanical material removal in CMP is caused by the rolling or sliding of abrasive particles, interfacial friction during processing greatly influences the CMP results. In this paper, the trend of tribology research on CMP process is discussed. First, various friction force monitoring methods are introduced, and three elements in the CMP tribo-system are defined based on the material removal mechanism of the CMP process. Tribological studies on the CMP process include studies of interfacial friction due to changes in consumables such as slurry and polishing pad, modeling of material removal rate using contact mechanics, and stick-slip friction and scratches. The real area of contact (RCA) between the polishing pad and wafer also has a significant influence on the polishing result in the CMP process, and many researchers have studied RCA control and prediction. Despite the fact that the CMP process is a hybrid process using chemical reactions and mechanical material removal, tribological studies to date have yet to clarify the effects of chemical reactions on interfacial friction. In addition, it is necessary to clarify the relationship between the interface friction phenomenon and physical surface defects in CMP, and the cause of their occurrence.

• Proceedings of the Korean Society of Precision Engineering Conference
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• 2013.05a
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• pp.37-38
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• 2013

• Proceedings of the Korean Society of Precision Engineering Conference
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• 2008.06a
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• pp.361-362
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• 2008

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2008.06a
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• pp.119-120
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• 2008

ILD CMP process has been well accepted for the planarization of the dielectric oxide film and becomes a critical process in ULSI manufacturing due to the rapid shrinkage of the design rule for the device. In total manufacturing process steps for a device, the proportion of ILD CMP process has been gradually increased. Ever since ILD CMP has been introduced, the scratches have been a major defects on polished surfaces which cause the electrical shorts between vias or metal lines [1,2]. It was reported that micro-scratches are caused by large, irregularly shaped particles during CMP process. Therefore, most of the CMP users have used < 5 m POU filter to remove and reduce the scratch source from the slurry. However, the scratch has always been the biggest concern in ILD polishing whatever preventive actions are taken. Silica and ceria slurries are widely used for ILD CMP process. There are not much differences in generated scratches and their formation mechanism. In this study, the scratches were investigated as a function of polishing conditions with possible explanation on formation mechanism in ILD CMP.

• Journal of the Korean Society for Precision Engineering
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• v.16 no.5 s.98
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• pp.40-47
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• 1999

In CMP for semiconductor wafer films, the acceptable within-chip planarity, within-wafer and wafer-to-wafer nonuniformity could be achieved by conditioning. The role of conditioning is to remove continuously polishing residues from pad and to maintain the initial pad surface pores. To reach these requirements, the diamond grits disk has been considered as a conventional conditioner. However, we have investigated many defects as scratch on wafers out of diamond grits shedding, contaminations from bonding materials, and pad pore subsidences by over-conditioning. So, this paper studies the effect of ultrasonic vibration in CMP conditioning as a representative. The effect of ultrasonic vibration was certified through ILD, Metal CMP.

• Proceedings of the KIEE Conference
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• 2006.10a
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• pp.103-104
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• 2006

$Pb(Zr,Ti)O_3(PZT)$ is very attractive ferroelectric materials for ferroelectric random access memory (FeRAM) applications because of its high polarization ability and low process temperature. However, Chemical Mechanical Polishing (CMP) pressure and velocity must be carefully adjusted because FeRAM shrinks to high density devices. The contaminations such as slurry residues due to the absence of the exclusive cleaning chemicals are enough to influence on the degradation of PZT thin film capacitors. The surface characteristics of PZT thin film were investigated by the change of process parameters and the cleaning process. Both the low CMP pressure and the cleaning process must be employed, even if the removal rate and the yield were decreased, to reduce the fatigue of PZT thin film capacitors fabricated by damascene process. Like this, fatigue characteristics were partially controlled by the regulation of the CMP process parameters in PZT damascene process. And the exclusive cleaning chemicals for PZT thin films were developed in this work.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.18 no.9
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• pp.803-809
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• 2005

Cerium ammonium nitrate (CAN) and nitric acid was used an etchant and an additive for Ru etching and polishing. pH and Eh values of the CAN and nitric acid added chemical solution satisfied the Ru etching condition. The etch rate increased linearly as the concentration of CAN increased. Nitric acid added solution had the high etch rate. But micro roughness of etched surfaces was not changed before and after etching, The removal rate of Ru film was the highest in $1wt\%$ abrasive added slurry, and not increased despite the concentration of alumina abrasive increased to $5wt\%$. Even Ru film was polished by only CAN solution due to the friction. The highest removal rate of 120nm/min was obtained in 1 M nitric acid and $1wt\%$ alumina abrasive particles added slurry. The lowest micro roughness value was observed in this slurry after polishing. From the XPS analysis of etched Ru surface, oxide layer was founded on the etched Ru surface. Therefore, Ru was polished by chemical etching of CAN solution and oxide layer abrasion by abrasive particles. From the result of removal rate without abrasive particle, the etching of CAN solution is more dominant to the Ru CMP.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2003.05c
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• pp.33-36
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• 2003

Tungsten is widely used as a plug for the multi-level interconnection structures. However, due to the poor adhesive properties of tungsten (W) on $SiO_2$ layer, the Ti/TiN barrier layer is usually deposited onto $SiO_2$ for increasing adhesion ability with W film. Generally, for the W-CMP (chemical mechanical polishing) process, the passivation layer on the tungsten surface during CMP plays an important role. In this paper, the effect of oxidants controlling the polishing selectivity of W/Ti/TiN layer were investigated. The alumina $(Al_2O_3)$ abrasive containing slurry with 5 % $H_2O_2$ as the oxidizer, was studied. As our preliminary experimental results, very low removal rates were observed for the case of no-oxidant slurry. This low removal rate is only due to the mechanical abrasive force. However, for Ti and TiN with 5 % $H_2O_2$ oxidizer, different removal rate was observed. The removal mechanism of Ti during CMP is mainly due to mechanical abrasive, whereas for TiN, it is due to the formation of metastable soluble peroxide complex.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2004.07a
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• pp.20-23
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• 2004

As the integrated circuit device shrinks to the smaller dimension, the chemical mechanical polishing(CMP) process was required for the global planarization of inter-metal dielectric(IMD) layer with free-defect. However, as the IMD layer gets thinner, micro-scratches are becoming as major defects. Chemical-Mechanical polishing(CMP) of conductors is a key process in Damascene patterning of advanced interconnect structure. The effect of alternative commercial slurries pads, and post-CMP cleaning alternatives are discuss, with removal rate, scratch dentisty, surface roughness, dishing, erosion and particulate density used as performance metrics. Electroplated copper deposition is a mature process from a historical point of view, but a very young process from a CMP perspective. While copper electro deposition has been used and studied for decades, its application to Cu damascene wafer processing is only now gaining complete acceptance in the semiconductor industry. The polishing mechanism of Cu-CMP process has been reported as the repeated process of passive layer formation by oxidizer and abrasion action by slurry abrasives. however it is important to understand the effect of oxidizer on copper passivation layer in order to obtain higher removal rate and non-uniformity during Cu-CMP process. In this paper, we investigated the effects of oxidizer on Cu-CMP process regarding the additional volume of oxidizer.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2008.06a
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• pp.543-543
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• 2008

반도체 집적회로의 제조 공정 중 CMP 공정이 필수 핵심기술이 되었다. 이처럼 CMP 공정 기술이 다층 배선 구조의 광역 평탄화를 위해서는 매우 효과적이지만 기계적인 연마패드와 화학적인 식각 작용을 하는 슬러리를 이용하여 연마가 진행되므로 공정 결함이 문제시되어 왔다. 그 중에서도, 소모자재의 비용이 CMP 공정비용의 70% 이상을 차지하는 제조단가가 높다는 단점이 있다. 특히 고가의 슬러리가 차지하는 비중이 40% 이상을 넘고 있어, 슬러리 원액의 소모량을 줄이기 위한 연구들이 현재 활발히 연구 중에 있다. 본 논문에서는 새로운 혼합 연마제 슬러리에 대한 CMP 특성을 통해 기존에 상용화된 슬러리의 CMP 특성과 비교 고찰하여 MAS의 우수성을 입증하고, 최적화된 공정기술 연구의 기반으로 활용하고자 실리카 슬러리에 $MnO_2$ 연마제를 혼합하여 연마특성을 비교분석하였고, AFM, EDX, XRD, TEM분석을 통해 그 가능성을 알아보았다.