• Title/Summary/Keyword: CDMA System Design

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A Study of Designing of Multi-Carrier CDMA System with Multi- Detector based on DGT

  • Kong, Hyung-Yun;Ho, Kwang-Chun
    • Proceedings of the IEEK Conference
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    • 2002.07b
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    • pp.1343-1345
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    • 2002
  • In this paper, we introduce the MC-CDMA (Multi-Carrier CDMA) system with MD (multi-detector). Due to unknown functional form of noise in wireless channel environments, it is not easy to design the detector through estimating the functional form of noise. Instead, we design the MD, which is constructed based on DGT (Data Grouping Technique) and quantiles estimated through RMSA (Robbins-Monro Stochastic Approximation) algorithm.

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Approximating the Outage Probability of the Pilot Channel for IS-95-Based Cellular CDMA Systems in the Soft Handover Region

  • Park, Seung-Keun;Cho, Pyung-Dong;Park, Ki-Shik;Cho, Kyung-Rok
    • ETRI Journal
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    • v.25 no.6
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    • pp.523-526
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    • 2003
  • This letter presents an approximation of the outage probability of the pilot channel that can be used for CDMA cell planning. The approximation can determine system parameters for soft handover in IS-95-based cellular CDMA downlink design. Computer simulations show that our analytical results agree with empirical results.

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Codesign of IS-95 based CDMA Searcher (IS-95 기반 CDMA Searcher의 통합설계)

  • 황인기
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.25 no.9A
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    • pp.1368-1376
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    • 2000
  • This paper describes the codesign method for IS-95 based CDMA(Code Division Multiple Access). By codesign we mean to design hardware and software simultaneously. Codesign lead to reduction in design time, cost and power consumption. When we partition a system into hardware and software, some modules with longer processing time and larger power consumption are implemented using hardware and the remaining part is implemented using software. In proposed design, we design the synchronous accumulator of CDMA searcher in hardware and the other part in software, The hardware part is designed using VHDL, while software part is designed using GC(Generic C). We simulated and verified the system using COSSAP in SYNOPSYSTM. Experimentation showed the maximum 48.5% speed reduction compared with the design using software only.

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A Study on Binary CDMA System Correlator Design for High-Speed Acquisition Processing (고속 동기 처리를 위한 Binary CDMA 시스템 코릴레이터 설계에 관한 연구)

  • Lee, Seon-Keun;Jeong, Woo-Yeol
    • Journal of the Korea Society of Computer and Information
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    • v.12 no.1 s.45
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    • pp.155-160
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    • 2007
  • Because output of multi-code CDMA system adapted high speed data transmission becoming multi-level system use linear amplifier in output stage and complex output signal. Therefore, Multi-Code CDMA system has shortcoming of high price, high complexity etc.. Binary CDMA technology that allow fetters in existing CDMA technology to supplement this shortcoming proposed. In binary CDMA system When correlator process high speed data, bottle-neck phenomenon is happened on synchronization acquisition process, it is very important parameter. Because existent correlator must there be advantage that power consumption is small but flow addition of several stages to receive correlation's value, the processing speed has disadvantage because the operation amount is much. Therefore in this paper, proposed correlator has characteristic such as data is able to high speed processing, chip area is independent and power consumption is constant in structure in binary CDMA system.

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A Design of Correlator with the PBS Architecture in Binary CDMA System (Binary CDMA 시스템에서 PBS 구조를 가지는 코릴레이터 설계)

  • Lee, Seon-Keun;Jeong, Woo-Yeol
    • The Journal of the Korea institute of electronic communication sciences
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    • v.3 no.3
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    • pp.177-182
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    • 2008
  • Because output of multi-code CDMA system adapted high speed data transmission becoming multi-level system use linear amplifier in output stage and complex output signal. Therefore, Multi-Code CDMA system has shortcoming of high price, high complexity etc. Binary CDMA technology that allow fetters in existing CDMA technology to supplement this shortcoming proposed. In binary CDMA system When correlator process high speed data, bottle-neck phenomenon is happened on synchronization acquisition process, it is very important parameter. Because existent correlator must there be advantage that power consumption is small but flow addition of several stages to receive correlation's value, the processing speed has disadvantage because the operation amount is much. Therefore in this paper, proposed correlator has characteristic such as data is able to high speed processing, chip area is independent and power consumption is constant in structure in binary CDMA system.

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Design of Multi-carrier Digital Transmitter Using a Direct Conversion Scheme (직접변환방식을 이용한 멀티캐리어 디지털 송신기 설계)

  • 신관호;조성언;오창헌
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.28 no.6A
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    • pp.425-432
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    • 2003
  • In this paper, we designed a multi-carrier digital transmitter for CDMA base-station using a direct conversion scheme and verified the performance through circuit simulations. We examined a new technology required to design a multi-carrier transmitter, then designed and simulated a multi-carrier digital transmitter. ADS (Advanced Design System), RF simulation S/W of Agilent Technologies, was used for designing and simulating the multi-carrier digital transmitter. First, we simulated a digital block and an analog block separately, then performed a co-simulation for entire system. From the results, the final analog outputs of the designed multi-carrier digital transmitter met the spectrum mask characteristics of IS-97 & 3G TS 25.104 standard requirements. It means that proposed scheme could be applied to implement a multi-carrier digital transmitter for CDMA base-station. Therefore, proposed multi-carrier digital transmitter using a direct conversion scheme can accomplish cost-reduction and improvements of technology in the next CDMA base-station.

Design and implementation of a speech coder for CDMA cellular system (CDMA 이동통신 시스템용 음성부호화기 설계 및 구현)

  • 장석진;윤병식;김재원;이원명;윤병우;이인성;최송인;임명섭;한기철
    • Journal of the Korean Institute of Telematics and Electronics B
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    • v.33B no.10
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    • pp.72-79
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    • 1996
  • We developed a speech coder that can transfer data as well as speech for CDMA digital cellular system. We describe the design method of the speech coder that uses QCELP algorithm for speech coding. The speech coder is implemented on a single fixed-point DSP chip (TMS320C50). the coder has the complexity such as 4K words in RAM, 10K words in ROM, and 33 MIPS in execution time. The developed speech coder is fully tested and successfully working on the CDMA base station system.

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Analysis and Optimization of Cross-Modulation Noise in CDMA Cellular RF System (CDMA 셀룰러 RF 시스템에서 교차변조 잡음 레벨 분석 및 최적화)

  • 곽준호;김학선
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.28 no.6A
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    • pp.397-404
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    • 2003
  • In this paper, we have analyzed the level of cross-modulation noise required for CDMA mobile station and proposed a guideline for optimum design. From the analysis, the level of cross-modulation noise is determined by the system's noise figure(NF) and VCO's phase noise and there is a trade-off relationships between them. In addition, we have determined the value of LNA's IIP3 and duplexer's isolation to satisfy the above level in designing the system. Therefore, this paper will give a guideline for a selection of components in designing cdma2000 mobile station.

Capacity Enhancement through Adaptive Antenna Array for a Multicarrier DS/CDMA System

  • Kim, Jin-Young
    • Proceedings of the IEEK Conference
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    • 2000.11a
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    • pp.433-436
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    • 2000
  • In this paper, capacity of a multicarrier DS/CDMA system is analyzed and simulated in a Nakagami fading channel. It is confirmed that the adaptive antenna array is a very efficient solution to enhance system capacity of a multicarrier DS/CDMA system. The results in this paper can be applicable to receiver design for the third and fourth mobile communication systems.

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Design of SSDT Cell ID Codes for W-CDMA System (W-CDMA 시스템의 SSDT 기지국 식별 부호 설계)

  • Song, Young-Joon
    • Proceedings of the IEEK Conference
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    • 2007.07a
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    • pp.69-70
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    • 2007
  • The code division multiple access (CDMA) system capacity is limited by the amount of interference of the system. To reduce the unnecessary interference, this paper proposes optimized cell identification (ID) codes for site selection diversity transmission (SSDT) power control in wideband code division multiple access system of third generation partnership project (3GPP). The proposed SSDT cell ID codes are designed to minimize the problem and to be easily decoded using simple fast Hadamard transformation (FHT) decoder.

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