• Title/Summary/Keyword: Bus operation

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A Study on Development of Bus Bunching Duration Model (버스몰림운행 지속시간 추정모형 개발에 관한 연구)

  • Kim, Eun-Gyeong;No, Jeong-Hyeon;Ryu, Si-Gyun
    • Journal of Korean Society of Transportation
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    • v.28 no.6
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    • pp.85-97
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    • 2010
  • The present study aims at estimating the model of bus bunching duration along with its influential determinants in an attempt to understand the status of bus bunching being created by buses from various routes converging into one bus stop. To do so, the duration analysis, a well-known survival analysis, was adopted in order to capture the distribution of duration time as for 8 base lines, accordingly developing the model best fit for weibull distribution. Key attention to draw out the duration time model for bus bunching phenomena was laid, by analyzing 18 impact factors, on such criterion variables as number of berth, number of bus line in each berth and maximum capacity of on-and-off passengers in each line. Comparison in two typical types of bus lane was made between bus-only center lane(Dobong Mia-ro) and normal street-side lane(Tongil Euiju-ro). In this regard, the study, based on the model as above, suggested appropriate alternatives to improve the bus operation by effectively controlling bus bunching.

A Study on Simulation Analysis for the Transmission Delay on the Process bus network in IEC 61850 Digital Substation (디지털변전소 통합 IED 용 Process Bus 네트워크 통신지연 시뮬레이션 연구)

  • Kim, Seok-Kon;An, Yong-Ho;Jang, Byung-Tae;Choi, Jong-Kee;Lee, Nam-Ho;Han, Jung-Yeol;Lee, You-Jin
    • Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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    • v.29 no.8
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    • pp.18-22
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    • 2015
  • Digitalization of the substation in Korea has been in progress so far with focusing on Station Bus. However, its application to Process Bus has been delayed due to some technical issues. IEDs based on Process Bus use the data values of SV and GOOSE. As the size of communication data on Process Bus is comparatively bigger than that of Station Bus, it is very important for the evaluating the performance of Process Bus to analyze the transferring speed and quality of data from the first equipment, which is located on process level, to station level. According to the results of related studies, it is said that the most important factor for the design and operation of Process Bus network is the communication delay with consideration of the volume of packets. In the paper, the results of performance test for the network with and without application of VLAN on Process Bus system that uses integrated IEDs are presented. Additionally, the paper proposes the optimal method to analyze the communication delays of network systems through evaluating the maximum delay time, link process ratio and the amount of lost packets by using a simulation tool.

Aerodynamics of an intercity bus

  • Sharma, Rajnish;Chadwick, Daniel;Haines, Jonathan
    • Wind and Structures
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    • v.11 no.4
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    • pp.257-273
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    • 2008
  • A number of passive aerodynamic drag reduction methods were applied separately and then in different combinations on an intercity bus model, through wind tunnel studies on a 1:20 scale model of a Mercedes Benz Tourismo 15 RHD intercity bus. Computational fluid dynamics (CFD) modelling was also conducted in parallel to assist with flow visualisation. The commercial CFD package $CFX^{TM}$ was used. It has been found that dramatic reductions in coefficient of drag ($C_D$) of up to 70% can be achieved on the model using tapered and rounded top and side leading edges, and a truncated rear boat-tail. The curved front section allows the airflow to adhere to the bus surfaces for the full length of the vehicle, while the boat-tails reduce the size of the low pressure region at the base of the bus and more importantly, additional pressure recovery occurs and the base pressures rise, reducing drag. It is found that the CFD results show remarkable agreement with experimental results, both in the magnitude of the force coefficients as well as in their trends. An analysis shows that such a reduction in aerodynamic drag could lead to a significant 28% reduction in fuel consumption for a typical bus on intercity or interstate operation. This could translate to a massive dollar savings as well as significant emissions reductions across a fleet. On road tests are recommended.

Development of destination arrival time prediction system for bus that applied smart-phone based real-time traffic information (스마트폰 기반 실시간 교통정보를 반영한 버스의 목적지 도착 시간 예측 시스템 개발)

  • Wang, Jong Soo;Kim, Dae Young
    • Journal of Korea Society of Digital Industry and Information Management
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    • v.9 no.4
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    • pp.127-134
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    • 2013
  • While there are many services that can check current traffic condition and application program such as bus arrival alarm are developed, since it only provide simple alarm and check level of information, it is still insufficient in many senses. Therefore, the program that try to develop in this study is the system that predict arrival time to destination and inform the bus passengers by applying real time traffic information. The system developed related to this study is still very inadequate. In the system developed in this thesis, when the user input the current bus number and destination using smart-phone, relevant server acquire the bus route information from bus information DB, and analyze real time traffic information based on the information from traffic information DB, and inform customer of expected arrival time to destination. In this thesis, traffic congestion can be eased off and regular operation of public transportation can be improved with reliable destination arrival alarm. Also, it is considered that pattern of bus users can be analyzed by using these information, and analyzing average transport speed and time of public transportation, travel time depending on various situation can give a boost to study related to transportation information and its development.

Bi-directional Bus Architecture Suitable to Multitasking in MPEG System (MPEG 시스템용 다중 작업에 적합한 양방향 버스 구조)

  • Jun Chi-hoon;Yeon Gyu-sung;Hwang Tae-jin;Wee Jae-Kyung
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.42 no.4 s.334
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    • pp.9-18
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    • 2005
  • This paper proposes the novel synchronous segmented bus architecture that has the pipeline bus architecture based on OCP(open core protocol) and the memory-oriented bus for MPEG system. The proposed architecture has bus architectures that support the memory interface for image data processing of MPEG system. Also it has the segmented hi-directional multiple bus architecture for multitasking processing by using multi -masters/multi - slave. In the scheme address of masters and slaves are fixed so that they are arranged for the location of IP cores according to operational characteristics of the system for efficient data processing. Also the bus architecture adopts synchronous segmented bus architecture for reuse of IP's and architecture or developed chips. This feature is suitable to the high performance and low power multimedia SoC systum by inherent characteristics of multitasking operation and segmented bus. Proposed bus architecture can have up to 3.7 times improvement in the effective bandwidth md up to 4 times reduction in the communication latency.

Development of Determining Technique of Optimum Signal Time of Intersections On Median Exclusive Bus Lane using Bus-only Signal (중앙버스전용차로 버스전용신호 도입시 신호 최적화에 관한 연구)

  • Kim, Bo-Gyeom;Kim, Seung-Il;Kim, Yeong-Chan;Kim, Jin-Tae
    • Journal of Korean Society of Transportation
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    • v.24 no.5 s.91
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    • pp.123-133
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    • 2006
  • Seoul and many large cities in Korea have implemented Median Exclusive Bus Lane(MEB). But exclusive bus lane in the middle of the road caused new contradictions between left turn movement and through bus movement and several signal operation techniques like 'left turn Protected' and 'overlap phase' couldn't be applied in intersections on MEB. We suggest 'Bus-only Signal for median lane technique as solution of these problems This study presents optimum signal time design process and detailed algorithms for intersections where bus-only signals are installed. As a test field. we took Yang-Je intersection where Median Exclusive Bus Lane go through. and have large gap in volume of left turn in main direction. And we verified that revised optimum signal time including overlap phase can reduce average delay time of vehicle through before and after simulation.

The study of Shaft Generators and Diesel Generators for parallel operation of control system (샤프트 발전기와 디젤 발전기의 병렬운전 제어시스템 설계에 대한 연구)

  • Hwang, Bo-Young;Kim, Young-Kil
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2012.05a
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    • pp.318-321
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    • 2012
  • This paper presents hybrid power system that consist of Shaft Generators and Diesel Generators, connection of Generator and Bus bar, operating method of Generator and design considerations of control system through parallel operation.

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The Functions and Roles of Bimodal Tram in the Public Transportation System (대중교통체계에서 바이모달 트램의 기능과 역할)

  • Yoon, Hee-Taek;Park, Young-Kon;Chang, Seky-Mok;Mok, Jae-Kyun
    • Proceedings of the KSR Conference
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    • 2008.06a
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    • pp.2463-2466
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    • 2008
  • The public transportation in operation or to be planned domestically includes subway, LRT, bimodal tram and bus, which are independently characterized in their passenger capacity and cost. High quality service is generally accompanied by high cost of construction and operation. Thus, ITS, BIS/BMS and BRT system are recently introduced to provide high quality service to the passengers with the cost as low as possible. The bimodal tram is under development to achieve such goals in public transportation. The passenger capacity is approximately expected to be 10,000$\sim$17,000 persons/hour and the construction cost to be 10$\sim$30 million dollars/km. It is possible to construct the infrastructure gradually depending on the demand of transportation in the planned route, which can effectively reduce the initial cost to launch the service. The bimodal tram is developed to provide the advantages of subway and bus to the passengers with respect to the scheduled operation and flexibility of the lines.

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Study on Calculation of Bus Stop Set-back Distance to Operate Turn lanes at Intersection on Median Exclusive Bus Lanes (중앙버스전용차로 교차로에서 회전차로 운영시 버스정지선 후퇴거리 산정에 관한 연구)

  • Im, Dong-wook;Lee, Young-Ihn
    • The Journal of The Korea Institute of Intelligent Transport Systems
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    • v.15 no.6
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    • pp.80-89
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    • 2016
  • The median exclusive bus lanes with the purpose of improving public transport as part of a public transport promoting policy propel to improves the speed of the bus and guarantee punctuality security of public transportation for citizen satisfaction. In Median Exclusive bus lanes, Intersection operational methods are classified as turn prohibition, left turn, left turn U-Turn after turn prohibition. However, there are not clear criteria for applying for turn left U-Turn and related researches. The purpose of this study is to search a method for more safely operation when we operate turn left U-Turn in median exclusive bus lanes intersection. As a result, Bus stop in median exclusive bus lane should set back 12m for left turn, 17m for left turn U-turn during 60km/h and set back 13m for left turn, 17m for left turn U-turn during 50km/h.

SOC Bus Transaction Verification Using AMBA Protocol Checker

  • Lee, Kab-Joo;Kim, Si-Hyun;Hwang, Hyo-Seon
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.2 no.2
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    • pp.132-140
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    • 2002
  • This paper presents an ARM-based SOC bus transaction verification IP and the usage experiences in SOC designs. The verification IP is an AMBA AHB protocol checker, which captures legal AHB transactions in FSM-style signal sequence checking routines. This checker can be considered as a reusable verification IP since it does not change unless the bus protocol changes. Our AHB protocol checker is designed to be scalable to any number of AHB masters and reusable for various AMBA-based SOC designs. The keys to the scalability and the reusability are Object-Oriented Programming (OOP), virtual port, and bind operation. This paper describes how OOP, virtual port, and bind features are used to implement AHB protocol checker. Using the AHB protocol checker, an AHB simulation monitor is constructed. The monitor checks the legal bus arbitration and detects the first cycle of an AHB transaction. Then it calls AHB protocol checker to check the expected AHB signal sequences. We integrate the AHB bus monitor into Verilog simulation environment to replace time-consuming visual waveform inspection, and it allows us to find design bugs quickly. This paper also discusses AMBA AHB bus transaction coverage metrics and AHB transaction coverage analysis. Test programs for five AHB masters of an SOC, four channel DMAs and a host interface unit are executed and transaction coverage for DMA verification is collected during simulation. These coverage results can be used to determine the weak point of test programs in terms of the number of bus transactions occurred and guide to improve the quality of the test programs. Also, the coverage results can be used to obtain bus utilization statistics since the bus cycles occupied by each AHB master can be obtained.