• Journal of the Institute of Electronics Engineers of Korea SD
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• v.37 no.3
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• pp.55-61
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• 2000

This paper presents an efficient hardware architecture of frame memory interface in MPEG-2 video encoder. To reduce the size of memory buffers between SDRAM and the frame memory module, the number of clocks needed for each memory access is minimized with dual bank operation and burst length change. By allocating the remaining cycles not used by SDRAM access, to the random access cycle, the internal buffer size, the data bus width, and the size of the control logic can be minimized. The proposed architecture is operated with 54MHz clock and designed with the VT $I^{тм}$ 0.5 ${\mu}{\textrm}{m}$ CMOS TLM standard cell library. It is verified by comparing the test vectors generated by the c-code model with the simulation results of the synthesized circuit. The buffer area of the proposed architecture is reduced to 40 % of the existing architecture.

• Journal of Korean Society of Transportation
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• v.30 no.5
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• pp.3-10
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• 2012

This study dealt with traffic accidents occurring within roundabouts. The objective was to develop roundabout accident models for different driving types by using simultaneous equations. In pursuing the above, this study used a statistical program SPSS 17.0 to accommodate data from 148 accidents occurred within 39 roundabouts of Korea. In addition, the 2SLS(2 stage least square) estimation method was adopted to calibrate the models. The main results are as follows. First, both the number of accidents and the EPDO were evaluated to have bilateral relationships. Second, all 6 different simultaneous equation models according to driving types were found to be statistically significant. Third, the developed models were compared to each other with respect to either common or specific variables. Finally, variables such as ADT, conflicting rate, heavy vehicle ratio, circulatory roadway width, number of circulatory roadway lane, approach lane width, average approach lanes, parking places, and bus stops were selected as independent variables for the models.

• Proceedings of the KIEE Conference
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• 2008.07a
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• pp.75-76
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• 2008

본 논문에서는 한국형 에너지 관리 시스템의 계통 해석용 프로그램을 위한 공통 데이터 모델의 구축에 대해 다루었다. 공통 데이터 모델이란 다양한 어플리케이션이 공유하여 사용할 수 있는 계통 모델의 데이터베이스를 가리키며 본 논문에서는 토폴로지 프로세서(topology processor, TP), 상태추정(state estimator, SE), 급전원 조류계산(dispatcher power flow, DPF), 휴전계획(outage scheduler, OS), 부하 분포계수(bus load distribution factor, BLDF), 송전 손실 민감도 계수(transmission loss sensitivity factor, TLSF) 등을 위한 공통 모델에 대해 다루었다. 공통 모델의 구축을 위해 각 어플리케이션에서 필요한 정보를 수집하여 전력계통의 토폴로지 구조과 계통 설비를 모델링 하였다. 최종적으로 계층적(hierarchy) 구조와 비계층적(non-hierarchy) 구조로 나뉘어진 직접(direct) 및 간접(indirect) 인덱스 코드를 사용하여 데이터로의 빠른 접근이 가능한 실시간 데이터베이스 형태를 제시하였다.

• Aerospace Engineering and Technology
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• v.12 no.2
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• pp.14-23
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• 2013

Fault management design of the satellite describes preparations for failures which can occur during operational phase. Fault management design contains detection and isolation function of anomaly, and also it contains function to maintain the satellite in safe condition until the ground station finds out a cause of failure and takes a countermeasure. Unlike normal operation, safing operation is automatically performed by Power Control and Distribution Unit and Integrated Bus Management Unit which loads Flight Software without intervention of ground station. Since fault management operation is automatical, fault management logic and functionality of relevant hardware should be thoroughly checked during ground test phase, and error which is similar to actual should be carefully applied without damage. Verification test for fault management design is conducted for various subsystems of satellite. In this paper, we show the design process of fault management design verification test for Electrical Power Subsystem and Attitude and Orbit Control Subsystem of Low Earth Orbit satellite flight model and the test results.

• KSII Transactions on Internet and Information Systems (TIIS)
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• v.2 no.1
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• pp.23-35
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• 2008

Mobile IP (MIP) is the solution supporting the mobility of Mobile Nodes (MNs), however, it is known to lack the support for NEtwork MObility (NEMO). NEMO manages situations when an entire network, composed of one or more subnets, dynamically changes its point of attachment to the Internet. NEMO Basic Support (NBS) protocol ensures session continuity for all the nodes in a mobile network, however, there exists a serious pinball routing problem. To overcome this weakness, there are many Route Optimization (RO) solutions such as Bi-directional Tunneling (BT) mechanism, Aggregation and Surrogate (A&S) mechanism, Recursive Approach, etc. The A&S RO mechanism is known to outperform the other RO mechanisms, except for the Binding Update (BU) cost. Although Improved Prefix Delegation (IPD) reduces the cost problem of Prefix Delegation (PD), a well-known A&S protocol, the BU cost problem still presents, especially when a large number of Mobile Routers (MRs) and MNs exist in the environment such as train, bus, ship, or aircraft. In this paper, a solution to reduce the cost of delivering the BU messages is proposed using a multicast mechanism instead of unicasting such as the traditional BU of the RO. The performance of the proposed multicast-based BU scheme is examined with an analytical model which shows that the BU cost enhancement is up to 32.9% over IPDbased, hence, it is feasible to predict that the proposed scheme could benefit in other NEMO RO protocols.

• Journal of Power Electronics
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• v.11 no.6
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• pp.870-879
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• 2011

Regulated peak power tracking (RPPT) systems such as the series structure and the series-parallel structures are commonly used in satellite space power systems. However, these structures process the solar array power or the battery power to the load through two cascaded regulators during one orbit cycle, which reduces the energy transfer efficiency. Also the battery charging time is increased due to placement of converter between the battery and the solar array. In this paper a parallel structure has been proposed which can improve the energy transfer efficiency and the battery charging time for satellite space power RPPT systems. An analogue controller is used to control all of the required functions, such as load voltage regulation and solar array stabilization with maximum power point tracking (MPPT). In order to compare the system efficiency and the battery charging efficiency of the proposed structure with those of a series (conventional) structure and a simplified series-parallel structure, simulations are performed and the results are analyzed using a loss analysis model. The proposed structure charges the battery more quickly when compared to the other two structures. Also the efficiency of the proposed structure has been improved under different modes of solar array operation when compared with the other two structures. To verify the system, experiments are carried out under different modes of solar array operation, including PPT charge, battery discharge, and eclipse and trickle charge.

• The Transactions of the Korea Information Processing Society
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• v.7 no.1
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• pp.65-73
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• 2000

This paper deals with a design and performance analysis of a parallel signal processing system based on TMS320C67x. With an emphasis on the board-level design of the processor unit four models are proposed with different memory configurations and internal bus schemes. Several approaches to parallel processing of 2D FFT are also presented to be used for performance analysis. The performance of four board models are estimated and compared in terms of the time spent for local memory access, inter-processor communication, and inter-board communication. The results of performance analysis show that, when performance and implementation complexity are taken into account, the model with both local and shared memories is the most desirable.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.19 no.12
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• pp.2340-2352
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• 1994

Under the current IN(Intelligent Network) Architecture, most of their function were performed in SSP(Service Switching point), so the provision or modification of service was limited. To over come these limitation, the structure of 'AIN(Advanced Intelligent Network)' emerged. In this paper, SSP for AIN structure is designed and its performance is evaluated. In other words, the requirements for AIN service implementation are specified on the basis of ITU-T Recommendations. From these requirments and TDX-10 Exchange architecture, the SSP for AIN structure is designed, and its performance is analyzed through the method of simulation and analytical modeling. As a conclusion of this paper, when the system is operated as a standard model, the maximum throughput is 1,270,000 BHCA for Free Phone Service and 1,190,000 BHCA for Credit Call Service. The processors in INS(Interconnection Network Subsystem) are proved to be bottleneck elements. To enhance the performance, several suggestions such as processor and link speedup, and other D_bus service policy are proposed.

• Plant Journal
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• v.12 no.4
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• pp.37-43
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• 2016

Power system which provides electricity to the accident mitigation load for nuclear power plant should be verified to maintain the proper voltage level under the various loading and source conditions. For this purpose, it was needed to collect the voltage data of safety related buses during operation of the Reactor Coolant Pump(RCP) motor and Component Cooling Water Pump(CCWP) motor, respectively, under the certain loading condition of the plant. The data (such as, voltage, current, power factor) collected from actual measurement were used to modify the existing ETAP model and then the reanalysis was conducted to simulate the testing conditions. Through these actual measurement and analysis, it ensures that the existing electrical system analysis including assumptions and methods was conducted properly. Finally, the voltage of safety related buses was not dropped below the acceptable level, and the discrepancy between two results was within the limit.

• The KIPS Transactions:PartD
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• v.17D no.1
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• pp.41-52
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• 2010

A relation between generated test cases and an original requirement is important, but it becomes very complex because a relation between requirement models and requirements are m-to-n in automatic test case generation based on models. In this paper, I suggest automatic generation technique for REED (REquirement EDitor), 1-to-1 requirement modeling tool. Test cases are generated though 3 steps, Coverage Target Generation, IORT (Input Output Relation Tree)Generation, and Test Cases Generation. All these steps are running automatically. The generated test cases can be generated from a single requirement. As a result of applying to three real commercial systems, there are 5566 test cases for the Temperature Controller, 3757 test cases for Bus Card Terminal, and 4611 test cases for Excavator Controller.